MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 190

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

1
1
Port Integration Module (S12GPIMV0)
2.4.3.36
2.4.3.37
190
Address 0x025A (G1, G2)
Address 0x025A (G3)
Address 0x025C (G1, G2)
Address 0x025C (G3)
Read: Anytime
Write: Anytime
Read: Anytime
Write: Anytime
DDRP
Field
Reset
Reset
Reset
Reset
7-0
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
W
W
W
W
R
R
R
R
Port P data direction—
This bit determines whether the associated pin is an input or output.
1 Associated pin configured as output
0 Associated pin configured as input
DDRP7
PERP7
Port P Data Direction Register (DDRP)
0
0
0
Port P Pull Device Enable Register (PERP)
0
0
0
7
7
7
7
DDRP6
PERP6
Figure 2-38. Port P Pull Device Enable Register (PERP)
0
0
0
0
0
0
6
6
6
6
Figure 2-37. Port P Data Direction Register (DDRP)
Table 2-63. DDRP Register Field Descriptions
MC9S12G Family Reference Manual,
DDRP5
DDRP5
PERP5
PERP5
0
0
0
0
5
5
5
5
DDRP4
DDRP4
PERP4
PERP4
0
0
0
0
4
4
4
4
Description
DDRP3
DDRP3
PERP3
PERP3
0
0
0
0
3
3
3
3
Rev.1.01
DDRP2
DDRP2
PERP2
PERP2
2
0
2
0
2
0
2
0
Freescale Semiconductor
DDRP1
DDRP1
PERP1
PERP1
Access: User read/write
Access: User read/write
Access: User read/write
Access: User read/write
0
0
0
0
1
1
1
1
DDRP0
DDRP0
PERP0
PERP0
0
0
0
0
0
0
0
0
1
1
1
1