MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 179

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

1
1
2.4.3.21
2.4.3.22
Freescale Semiconductor
Address 0x0249
Address 0x024A
Read: Anytime
Write:Never
Read: Anytime
Write: Anytime
Field
Field
PTIS
PTS
Reset
Reset
7-0
7-0
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
W
W
R
R
Port S general-purpose input/output data—Data Register
When not used with an alternative signal, the associated pin can be used as general-purpose I/O. In
general-purpose output mode the port data register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port data register bit, otherwise the
buffered pin input state is read.
Port S input data—
A read always returns the buffered input state of the associated pin. It can be used to detect overload or short circuit
conditions on output pins.
DDRS7
PTIS7
Port S Input Register (PTIS)
0
Port S Data Direction Register (DDRS)
0
7
7
DDRS6
PTIS6
0
0
6
6
Figure 2-23. Port S Data Direction Register (DDRS)
Table 2-41. PTIS Register Field Descriptions
Table 2-40. PTS Register Field Descriptions
MC9S12G Family Reference Manual, Rev.1.01
Figure 2-22. Port S Input Register (PTIS)
DDRS5
PTIS5
0
0
5
5
DDRS4
PTIS4
0
0
4
4
Description
Description
DDRS3
PTIS3
0
0
3
3
DDRS2
PTIS2
2
0
2
0
Port Integration Module (S12GPIMV0)
DDRS1
Access: User read/write
PTIS1
Access: User read only
0
0
1
1
DDRS0
PTIS0
0
0
0
0
179
1
1