MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 415
MC9S12G
Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12G.pdf
(1160 pages)
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12.3.2.11 ATD Compare Higher Than Register (ATDCMPHT)
Writes to this register will abort current conversion sequence.
Read: Anytime
Write: Anytime
12.3.2.12 ATD Conversion Result Registers (ATDDRn)
The A/D conversion results are stored in 12 result registers. Results are always in unsigned data
representation. Left and right justification is selected using the DJM control bit in ATDCTL3.
If automatic compare of conversions results is enabled (CMPE[n]=1 in ATDCMPE), these registers must
be written with the compare values in left or right justified format depending on the actual value of the
DJM bit. In this case, as the ATDDRn register is used to hold the compare value, the result will not be
stored there at the end of the conversion but is lost.
Attention, n is the conversion number, NOT the channel number!
Read: Anytime
Write: Anytime
12.3.2.12.1 Left Justified Result Data (DJM=0)
Freescale Semiconductor
Module Base + 0x000E
CMPHT[11:0]
Reset
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Field
11–0
W
R
15
0
0
Compare Operation Higher Than Enable for conversion number n (n= 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0) of
a Sequence (n conversion number, NOT channel number!) — This bit selects the operator for comparison
of conversion results.
0 If result of conversion n is lower or same than compare value in ATDDRn, this is flagged in ATDSTAT2
1 If result of conversion n is higher than compare value in ATDDRn, this is flagged in ATDSTAT2
= Unimplemented or Reserved
For conversions not using automatic compare, results are stored in the result
registers after each conversion. In this case avoid writing to ATDDRn except
for initial values, because an A/D result might be overwritten.
14
0
0
Figure 12-13. ATD Compare Higher Than Register (ATDCMPHT)
13
0
0
12
0
0
Table 12-20. ATDCMPHT Field Descriptions
MC9S12G Family Reference Manual, Rev.1.01
11
0
10
0
0
9
NOTE
0
8
Description
0
7
CMPHT[11:0]
0
6
Analog-to-Digital Converter (ADC10B12CV2)
0
5
0
4
0
3
2
0
0
1
0
0
415
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