MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 520

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MC9S12G

Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Freescale’s Scalable Controller Area Network (S12MSCANV3)
520
Extended Identifier
Standard Identifier
CAN 2.0A/B
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
CAN 2.0B
— The 14 most significant bits of the extended identifier plus the SRR and IDE bits of CAN 2.0B
— The 11 bits of the standard identifier, the RTR and IDE bits of CAN 2.0A/B messages.
Eight identifier acceptance filters, each to be applied to the first 8 bits of the identifier. This mode
implements eight independent filters for the first 8 bits of a CAN 2.0A/B compliant standard
identifier or a CAN 2.0B compliant extended identifier.
Figure 16-42
CANIDMR0–CANIDMR3) produces filter 0 to 3 hits. Similarly, the second filter bank
(CANIDAR4–CANIDAR7, CANIDMR4–CANIDMR7) produces filter 4 to 7 hits.
Closed filter. No CAN message is copied into the foreground buffer RxFG, and the RXF flag is
never set.
messages.
Figure 16-41
CANIDMR0–CANIDMR3) produces filter 0 and 1 hits. Similarly, the second filter bank
(CANIDAR4–CANIDAR7, CANIDMR4–CANIDMR7) produces filter 2 and 3 hits.
AM7
AC7
ID28
ID10
shows how the first 32-bit filter bank (CANIDAR0–CANIDAR3,
CANIDMR0
CANIDAR0
IDR0
IDR0
Figure 16-40. 32-bit Maskable Identifier Acceptance Filter
shows how the first 32-bit filter bank (CANIDAR0–CANIDAR3,
ID21
AM0
AC0
MC9S12G Family Reference Manual,
ID3
AM7
AC7
ID20
ID2
CANIDMR1
CANIDAR1
IDR1
IDR1
ID Accepted (Filter 0 Hit)
IDE
AM0
ID15
AC0
AM7
AC7
ID14
ID10
Rev.1.01
CANIDMR2
CANIDAR2
IDR2
IDR2
AM0
AC0
ID7
ID3
AM7
AC7
ID6
ID10
Freescale Semiconductor
CANIDMR3
CANIDAR3
IDR3
IDR3
AM0
RTR
AC0
ID3

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