MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 508

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Freescale’s Scalable Controller Area Network (S12MSCANV3)
Read:
Write:
Reset: Undefined because of RAM-based implementation
16.3.3.1
The identifier registers for an extended format identifier consist of a total of 32 bits: ID[28:0], SRR, IDE,
and RTR. The identifier registers for a standard format identifier consist of a total of 13 bits: ID[10:0],
RTR, and IDE.
508
Register
Register
0x00X0
0x00X1
0x00X2
0x00X3
•
•
•
•
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Name
Name
IDR0
IDR1
IDR2
IDR3
For transmit buffers, anytime when TXEx flag is set (see
Flag Register
Section 16.3.2.11, “MSCAN Transmit Buffer Selection Register
For receive buffers, only when RXF flag is set (see
Register
For transmit buffers, anytime when TXEx flag is set (see
Flag Register
Section 16.3.2.11, “MSCAN Transmit Buffer Selection Register
Unimplemented for receive buffers.
Figure 16-24. Receive/Transmit Message Buffer — Extended Identifier Mapping (continued)
Identifier Registers (IDR0–IDR3)
Figure 16-25. Receive/Transmit Message Buffer — Standard Identifier Mapping
W
W
W
W
R
R
R
R
(CANRFLG)”).
Bit 7
Bit 7
ID10
ID2
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see
= Unused, always read ‘x’
= Unused, always read ‘x’
ID9
ID1
6
6
MC9S12G Family Reference Manual,
ID8
ID0
5
5
RTR
ID7
4
4
Section 16.3.2.5, “MSCAN Receiver Flag
IDE (=0)
Section 16.3.2.7, “MSCAN Transmitter
Section 16.3.2.7, “MSCAN Transmitter
ID6
Rev.1.01
3
3
(CANTBSEL)”).
(CANTBSEL)”).
ID5
2
2
Freescale Semiconductor
ID4
1
1
Bit 0
Bit0
ID3