MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 502

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MC9S12G

Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Freescale’s Scalable Controller Area Network (S12MSCANV3)
16.3.2.15 MSCAN Receive Error Counter (CANRXERR)
This register reflects the status of the MSCAN receive error counter.
1
16.3.2.16 MSCAN Transmit Error Counter (CANTXERR)
This register reflects the status of the MSCAN transmit error counter.
1
502
Module Base + 0x000E
Module Base + 0x000F
Read: Only when in sleep mode (SLPRQ = 1 and SLPAK = 1) or initialization mode (INITRQ = 1 and INITAK = 1)
Write: Unimplemented
Read: Only when in sleep mode (SLPRQ = 1 and SLPAK = 1) or initialization mode (INITRQ = 1 and INITAK = 1)
Write: Unimplemented
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Reset:
Reset:
W
W
R
R
RXERR7
TXERR7
Reading this register when in any other mode other than sleep or
initialization mode may return an incorrect value. For MCUs with dual
CPUs, this may result in a CPU fault condition.
Writing to this register when in special modes can alter the MSCAN
functionality.
Reading this register when in any other mode other than sleep or
initialization mode, may return an incorrect value. For MCUs with dual
CPUs, this may result in a CPU fault condition.
0
0
7
7
Figure 16-19. MSCAN Transmit Error Counter (CANTXERR)
Figure 16-18. MSCAN Receive Error Counter (CANRXERR)
RXERR6
TXERR6
= Unimplemented
= Unimplemented
0
0
6
6
MC9S12G Family Reference Manual,
RXERR5
TXERR5
0
0
5
5
RXERR4
TXERR4
NOTE
NOTE
0
0
4
4
RXERR3
TXERR3
0
0
3
3
Rev.1.01
RXERR2
TXERR2
2
0
2
0
RXERR1
TXERR1
Freescale Semiconductor
Access: User read/write
Access: User read/write
0
0
1
1
RXERR0
TXERR0
0
0
0
0
1
1

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