MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 139
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MC9S12G
Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12G.pdf
(1160 pages)
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PP3-PP2
PP1
PP0
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
• Except 20 TSSOP: The PWM channels 3 and 2 signal are mapped to these pins when used with the
• Except 20 TSSOP: The ADC ETRIG 3 and 2 signal are mapped to these pins when used with the ADC
• Except 20 TSSOP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
• Except 20 TSSOP: The PWM channel 1 signal is mapped to this pin when used with the PWM function.
• Except 100 LQFP and 20 TSSOP: The ECLKX2 signal is mapped to this pin when used with the
• Except 20 TSSOP: The ADC ETRIG1 signal is mapped to this pin when used with the ADC function.
• Except 20 TSSOP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
• Except 20 TSSOP: The PWM channel 0 signal is mapped to this pin when used with the PWM function.
• Except 100 LQFP and 20 TSSOP: The API_EXTCLK signal is mapped to this pin when used with the
• Except 20 TSSOP: The ADC ETRIG0 signal is mapped to this pin when used with the ADC function.
• Except 20 TSSOP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
PWM function. The enabled PWM channel forces the I/O state to be an output.
function. The enabled external trigger function has no effect on the I/O state. Refer to
“ADC External Triggers
Except 20 TSSOP: PWM > GPO
The enabled PWM channel forces the I/O state to be an output.
external clock function. The enabled ECLKX2 forces the I/O state to an output.
The enabled external trigger function has no effect on the I/O state. Refer to
External Triggers
Except 100 LQFP and 20 TSSOP: PWM1 > ECLKX2 > GPO
100 LQFP: PWM1 > GPO
The enabled PWM channel forces the I/O state to be an output.
external clock function. If the Autonomous Periodic Interrupt clock is enabled and routed here the I/O
state is forced to output.
The enabled external trigger function has no effect on the I/O state. Refer to
External Triggers
Except 100 LQFP and 20 TSSOP: PWM0 > API_EXTCLK > GPO
100 LQFP: PWM0 > GPO
Table 2-14. Port
MC9S12G Family Reference Manual, Rev.1.01
ETRIG3-0”.
ETRIG3-0”.
ETRIG3-0”.
P
Pins PP7-0 (continued)
Port Integration Module (S12GPIMV0)
Section 2.6.4, “ADC
Section 2.6.4, “ADC
Section 2.6.4,
139
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