MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 485

• Manufacturer Part Number: MPC8544DS
• Description: BOARD DEVELOPMENT SYSTEM 8544
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8544DS

• Contents: Board
• Processor To Be Evaluated: MPC8544E
• Data Bus Width: 32 bit
• Interface Type: Ethernet, I2C
• Operating Supply Voltage: - 0.3 V to + 1.1 V
• Leaded Process Compatible: Yes
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• For Use With/related Products: MPC8544
• For Use With: PPC8544EVTANG - EVAL MPC8544 783FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

For more information, refer to
12.1.2
Execution unit (EU) is the generic term for a functional block that performs the mathematical
manipulations required by protocols used in cryptographic processing. The EUs are compatible with
IPSec, IKE, SSL/TLS, iSCSI, SRTP, and 802.11i processing, and can work together to perform high-level
cryptographic tasks. The SEC’s execution units are as follows:
Each EU is described in detail in
12.1.2.1
The PKEU is capable of performing many advanced mathematical functions to support both RSA and
ECC public-key cryptographic algorithms. ECC is supported in both F(2)m (polynomial-basis) and F(p)
modes. This EU supports all levels of functions to assist the host microprocessor to perform its desired
cryptographic function. For example, at the highest level, the accelerator performs modular
exponentiations to support RSA and performs point multiplies to support ECC. At the lower levels, the
PKEU can perform simple operations such as modular multiplies. For more information, refer to
Section 12.4.1, “Public Key Execution Unit (PKEU).”
12.1.2.1.1
The PKEU has its own data and control units, including a general-purpose register file in the
programmable-size arithmetic unit. The field or modulus size can be programmed to any value between
160 bits and 512 bits in programmable increments of 8, with each programmable value i supporting all
actual field sizes from 8i – 7 to 8i. The result is hardware supporting a wide range of cryptographic
security. Larger field/modulus sizes result in greater security but lower performance; processing time is
determined by field or modulus size. For example, a field size of 160 is roughly equivalent to the security
provided by 1024-bit RSA. A field size set to 208 roughly equates to 2048 bits of RSA security.
The PKEU contains routines implementing the atomic functions for elliptic curve processing—point
arithmetic and finite field arithmetic. The point operations (multiplication, addition and doubling) involve
one or more finite field operations which are addition, multiplication, inverse, and squaring. Point add and
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Seven long-words containing pointers and lengths used to locate input or output data. Each pointer
can either point directly to the data, or can point to a link table that lists a set of data segments to
be concatenated.
PKEU for computing asymmetric key operations, including modular exponentiation (and other
modular arithmetic functions) or ECC point arithmetic
DEU for performing block cipher, symmetric key cryptography using DES and 3DES
AFEU for performing RC-4 compatible stream cipher symmetric key cryptography
AESU for performing the Advanced Encryption Standard algorithm and XOR acceleration
MDEU for performing security hashing using MD-5, SHA-1, or SHA-256
KEU for performing 3GPP confidentiality and integrity (F8 and F9) algorithms.
RNG for random number generation
Execution Units (EUs)
Public Key Execution Unit (PKEU)
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Elliptic Curve Operations
Section 12.3, “Descriptor Overview.”
Section 12.4, “Execution Units.”
Security Engine (SEC) 2.1
12-5