MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 66

• Manufacturer Part Number: MPC8544DS
• Description: BOARD DEVELOPMENT SYSTEM 8544
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8544DS

• Contents: Board
• Processor To Be Evaluated: MPC8544E
• Data Bus Width: 32 bit
• Interface Type: Ethernet, I2C
• Operating Supply Voltage: - 0.3 V to + 1.1 V
• Leaded Process Compatible: Yes
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• For Use With/related Products: MPC8544
• For Use With: PPC8544EVTANG - EVAL MPC8544 783FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure
Number
20-8
20-9
20-10
20-11
21-1
21-2
21-3
21-4
21-5
21-6
21-7
21-8
21-9
21-10
21-11
21-12
21-13
21-14
21-15
21-16
21-17
21-18
21-19
21-20
21-21
21-22
21-23
lxvi
Performance Monitor Counter Register (PMC1–PMC9) ................................................... 20-11
Duration Threshold Event Sequence Timing Diagram ....................................................... 20-13
Burst Size, Distance, Granularity, and Burstiness Counting............................................... 20-14
Burstiness Counting Timing Diagram ................................................................................ 20-16
Debug and Watchpoint Monitor Block Diagram .................................................................. 21-2
Watchpoint Monitor Control Register 0 (WMCR0) ........................................................... 21-11
Watchpoint Monitor Control Register 1 (WMCR1) ........................................................... 21-12
Watchpoint Monitor Address Register (WMAR) ............................................................... 21-13
Watchpoint Monitor Address Mask Register (WMAMR).................................................. 21-14
Watchpoint Monitor Transaction Mask Register (WMTMR)............................................. 21-14
Watchpoint Monitor Status Register (WMSR) ................................................................... 21-16
Trace Buffer Control Register 0 (TBCR0).......................................................................... 21-16
Trace Buffer Control Register 1 (TBCR1).......................................................................... 21-18
Trace Buffer Address Register (TBAR).............................................................................. 21-19
Trace Buffer Address Mask Register (TBAMR) ................................................................ 21-19
Trace Buffer Transaction Mask Register (TBTMR) ........................................................... 21-20
Trace Buffer Status Register (TBSR).................................................................................. 21-20
Trace Buffer Access Control Register (TBACR)) .............................................................. 21-21
Trace Buffer Read High Register (TBADHR).................................................................... 21-22
Trace Buffer Access Data Register (TBADR) .................................................................... 21-23
Programmed Context ID Register (PCIDR) ....................................................................... 21-23
Current Context ID Register (CCIDR) ............................................................................... 21-24
Trigger Out Source Register (TOSR).................................................................................. 21-24
e500 Coherency Module Dispatch (CMD) Trace Buffer Entry .......................................... 21-28
DDR Trace Buffer Entry ..................................................................................................... 21-29
PCI Trace Buffer Entry ....................................................................................................... 21-29
PCI Express Trace Buffer Entry.......................................................................................... 21-30
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
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Freescale Semiconductor
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