MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 713
MPC8544DS
Manufacturer Part Number
MPC8544DS
Description
BOARD DEVELOPMENT SYSTEM 8544
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
4.MPC8544DS.pdf
(2 pages)
Specifications of MPC8544DS
Contents
Board
Processor To Be Evaluated
MPC8544E
Data Bus Width
32 bit
Interface Type
Ethernet, I2C
Operating Supply Voltage
- 0.3 V to + 1.1 V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
For Use With/related Products
MPC8544
For Use With
PPC8544EVTANG - EVAL MPC8544 783FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MPC8544VTALF PDF datasheet
- MPC8544VTALF PDF datasheet #2
- MPC8544VTALF PDF datasheet #3
- MPC8544DS PDF datasheet #4
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- Download datasheet (12Mb)
14.5.4.3.8
To allow for very high speeds on the memory bus, the capacitive loading on the local bus must be taken
into consideration as shown in
To implement a system using the hierarchy described earlier for 2 synchronous memory banks, 1 address
latch, and 1 buffer loading the multiplexed address/data bus sees a loading of 4 loads of about 6.5 pF
maximum. For a nominal load, 30 pF can be used.
Freescale Semiconductor
t
EXTERNAL CK
CKE
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
RE
CE
An
W
S
SDRAM Timing
Note:Capacitance values compiled from worst case numbers from
RAS, CAS, WE, CS, CKE, DQM
various data sheets from Samsung and Micron
All banks idle
Figure 14-76. SDRAM Self-Refresh Mode Timing
Table
Self-refresh entry
DQ
Address
Signal
CLK
0
Table 14-42. SDRAM Capacitance
–DQ
14-42.
31
Self-refresh exit
Stable clock
Min
2.0
2.0
2.0
3.5
Max
4.0
5.0
5.0
6.5
Supplier-specific
minimum time
New command
can occur here
Unit
NOP
pf
pf
pf
pf
Local Bus Controller
14-93
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