SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 1040

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SAM9G45

Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G45

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
43.7.3.11
43.7.3.12
43.7.3.13
1040
31
31
31
31
31
31
SAM9G45
Byte0[7:0]
To Receive Word transfers
To Receive Halfword Transfers
To Receive 10-bit Samples
Data received on appropriate slot: data[19:0] = {Byte2[3:0], Byte1[7:0], Byte0[7:0]}.
Word stored in AC97 Controller Channel x Receive Holding Register (AC97C_CxRHR)
(Received Data)
Data is read from AC97 Controller Channel x Receive Holding Register (AC97C_CxRHR) when
Channel x data size is greater than 16 bits and when big-endian mode is enabled (data written to
memory).
Data received on appropriate slot: data[19:0] = {0x0, Byte1[7:0], Byte0[7:0]}.
Halfword stored in AC97 Controller Channel x Receive Holding Register (AC97C_CxRHR)
(Received Data).
Data is read from AC97 Controller Channel x Receive Holding Register (AC97C_CxRHR) when
data size is equal to 16 bits and when big-endian mode is enabled.
Data received on appropriate slot: data[19:0] = {0x000, Byte1[1:0], Byte0[7:0]}.Halfword stored
in AC97 Controller Channel x Receive Holding Register (AC97C_CxRHR) (Received Data)
Data read from AC97 Controller Channel x Receive Holding Register (AC97C_CxRHR) when
data size is equal to 10 bits and when big-endian mode is enabled.
24
24
24
24
24
24
23
23
23
23
23
23
Byte1[7:0]
20
.
19
Byte2[3:0]
16
16
16
16
16
16
15
15
15
15
15
{0x0, Byte2[3:0]}
Byte0[7:0]
Byte1[7:0]
Byte1[7:0]
Byte0[7:0]
15
10
Byte1
9
[1:0]
8
8
8
8
8
8
7
7
7
7
7
7
0x00
Byte0[7:0]
Byte0[7:0]
Byte1[7:0]
Byte0[7:0]
6438G–ATARM–19-Apr-11
0x00
3
Byte1
1
[1:0]
0
0
0
0
0
0

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