SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 917
SAM9G45
Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G45.pdf
(10 pages)
5.SAM9G45.pdf
(55 pages)
6.SAM9G45.pdf
(1196 pages)
Specifications of SAM9G45
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9G45 PDF datasheet #4
- SAM9G45 PDF datasheet #5
- SAM9G45 PDF datasheet #6
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40.6.4
40.6.5
40.7
40.7.1
6438G–ATARM–19-Apr-11
Touch Screen
Startup Time
Sample and Hold Time
Resistive Touch Screen Principles
The Touch Screen ADC has a minimal Startup Time when it exits the Sleep Mode. As the ADC
Clock depends on the application, the user has to program the field STARTUP in the
Mode
conversion of the sequence.
The field STARTUP can define a Startup Time between 8 and 1024 ADC Clock cycles by steps
of 8.
The user must assure that ADC Startup Time given in the section “Electrical Characteristics” is
covered by this wait time.
In the same way, a minimal Sample and Hold Time is necessary for the TSADCC to guarantee
the best converted final value between selection of two channels. This time depends on the input
impedance of the analog input, but also on the output impedance of the driver providing the sig-
nal to the analog input, as there is no input buffer amplifier.
The Sample and Hold time has to be programmed through the bitfields SHTIM in the
Mode Register”
The field SHTIM defines the number of ADC Clock cycles for an analog input, while the field
TSSHTIM defines the number of ADC Clock cycles for a Touch Screen input.
These both fields can define a Sample and Hold time between 1 and 16 ADC Clock cycles.
The field TSSHTIM defines also the time the power switches of the Touch Screen are closed
when the TSADCC performs a conversion for the Touch Screen.
A resistive touch screen is based on two resistive films, each one being fitted with a pair of elec-
trodes, placed at the top and bottom on one film, and on the right and left on the other. Between
the two, there is a layer that acts as an insulator, but also enables contact when you press the
screen. This is illustrated in
The TSADC controller has the ability to perform without external components:
• Position Measurement
• Pressure Measurement
• Pen Detection
Register”, which defines how many ADC Clock cycles to wait before performing the first
and TSSHTIM in the
Figure
40-2.
“TSADCC Touch Screen
Register”.
SAM9G45
“TSADCC
“TSADCC
917
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