SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 1056

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SAM9G45

Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G45

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
43.8.11
Register Name:AC97C_CAMR
Address:
Access Type: Read-write
• TXRDY: Channel Transmit Ready Interrupt Enable
• TXEMPTY: Channel Transmit Empty Interrupt Enable
• UNRUN: Transmit Underrun Interrupt Enable
• RXRDY: Channel Receive Ready Interrupt Enable
• OVRUN: Receive Overrun Interrupt Enable
• ENDTX: End of Transmission for Channel A Interrupt Enable
• TXBUFE: Transmit Buffer Empty for Channel A Interrupt Enable
0: Read: the corresponding interrupt is disabled. Write: disables the corresponding interrupt.
1: Read: the corresponding interrupt is enabled. Write: enables the corresponding interrupt.
• ENDRX: End of Reception for Channel A Interrupt Enable
0: Read: the corresponding interrupt is disabled. Write: disables the corresponding interrupt.
1: Read: the corresponding interrupt is enabled. Write: enables the corresponding interrupt.
• RXBUFF: Receive Buffer Full for Channel A Interrupt Enable
0: Read: the corresponding interrupt is disabled. Write: disables the corresponding interrupt.
1: Read: the corresponding interrupt is enabled. Write: enables the corresponding interrupt.
• SIZE: Channel A Data Size
SIZE Encoding
Note:
1056
RXBUFF
31
23
15
7
Each time slot in the data phase is 20 bit long. For example, if a 16-bit sample stream is being played to an AC 97 DAC, the first
16 bit positions are presented to the DAC MSB-justified. They are followed by the next four bit positions that the AC97 Controller
SAM9G45
SIZE
AC97 Controller Channel A Mode Register
0x0
0x1
0x2
0x3
0xFFFAC02C
PDCEN
ENDRX
30
22
14
6
Selected Data Size
20 bits
18 bits
16 bits
10 bits
OVRUN
CEN
29
21
13
5
RXRDY
28
20
12
4
TXBUFE
27
19
11
3
UNRUN
ENDTX
CEM
26
18
10
2
TXEMPTY
25
17
9
1
6438G–ATARM–19-Apr-11
SIZE
TXRDY
24
16
8
0

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