SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 162

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

20.2.5
20.2.5.1
Table 20-4.
Notes:
162
Signals:
EBI_
Controller
D0 - D7
D8 - D15
D16 - D23
D24 - D31
A0/NBS0
A1/NWR2/NBS2
A2 - A22
A23 - A25
NCS0
NCS1/DDRSDCS
NCS2
NCS3/NANDCS
NCS4/CFCS0
NCS5/CFCS1
NRD/CFOE
NWR0/NWE
NWR1/NBS1
NWR3/NBS3
1. NWR1 enables upper byte writes. NWR0 enables lower byte writes.
2. NWRx enables corresponding byte x writes. (x = 0,1,2 or 3)
3. NBS0 and NBS1 enable respectively lower and upper bytes of the lower 16-bit word.
4. NBS2 and NBS3 enable respectively lower and upper bytes of the upper 16-bit word.
(5)
SAM9G45
Application Example
Hardware Interface
EBI Pins and External Static Devices Connections
8-bit Static
A[23:25]
Device
D0 - D7
A[2:22]
Table 20-4 on page 162
external devices for each Memory Controller.
WE
OE
CS
CS
CS
CS
CS
CS
A0
A1
–
–
–
–
–
2 x 8-bit
Devices
D8 - D15
A[22:24]
D0 - D7
A[1:21]
Static
WE
WE
CS
CS
CS
CS
CS
CS
OE
A0
–
–
–
–
(1)
(1)
details the connections to be applied between the EBI pins and the
16-bit Static
Pins of the Interfaced Device
D8 - D15
A[22:24]
Device
D0 - D7
A[1:21]
NUB
NLB
WE
CS
CS
CS
CS
CS
CS
OE
A0
–
–
–
SMC
D16 - D23
D24 - D31
4 x 8-bit
D8 - D15
Devices
A[21:23]
D0 - D7
A[0:20]
Static
WE
WE
WE
WE
CS
CS
OE
CS
CS
CS
CS
–
(2)
(2)
(2)
(2)
2 x 16-bit
D16 - D23
D24 - D31
Devices
A[21:23]
D0 - D7
D8 - 15
A[0:20]
NUB
NUB
Static
NLB
NLB
WE
CS
CS
CS
CS
CS
CS
OE
(3)
(4)
(3)
(4)
6438G–ATARM–19-Apr-11
32-bit Static
D16 - D23
D24 - D31
A[21:23]
D0 - D7
Device
D8 - 15
A[0:20]
BE0
BE2
BE1
BE3
WE
CS
CS
CS
CS
CS
CS
OE