SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 59

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SAM9G45

Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G45

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
11.3
11.3.1
11.3.2
6438G–ATARM–19-Apr-11
Device Initialization
Clock at Start Up
Initialization Sequence
At boot start up, the processor clock (PCK) and the master clock (MCK) are found on the slow
clock. The slow clock can be an external 32 kHz crystal oscillator or the internal RC oscillator. By
default the slow clock is the internal RC oscillator. Its frequency is not precise and is between 20
kHz and 40 kHz. Its start up is much faster than an external 32 kHz quartz. If a battery supplies
the backup power and if the external 32 kHz clock was previously started up and selected, the
slow clock at boot is the external 32 kHz quartz oscillator. Refer to the Slow Clock Crystal Oscil-
lator description in the Clock Generator section of the datasheet.
Initialization follows the steps described below:
1. Stack setup for ARM supervisor mode.
2. Main Oscillator Detection: (External crystal or external clock on XIN). The Main Oscil-
3. Main Oscillator Enabling: if an external clock is connected on XIN, the Main Oscillator
4. Main Oscillator Selection: the Master Clock source is switched from Slow Clock to the
5. C variable initialization: non zero-initialized data are initialized in RAM (copy from
6. PLLA initialization: PLLA is configured to allow communication on the USB link for the
lator is disabled at startup (MOSCEN = 0). First it is bypassed (OSCBYPASS set at 1).
Then the MAINRDY bit is polled. Since this bit is raised, the Main Clock Frequency field
is analyzed (MAINF). If the value is bigger than 16, an external clock connected on XIN
is detected. If not, an external quartz connected between XIN and XOUT (whose fre-
quency is unknown at this moment) is detected.
does not need to be started. Otherwise, the OSCBYPASS bit is not set. The Main Oscil-
lator is enabled (MOSCEN = 1) with the maximum start-up time and the MOSC bit is
polled to wait for stabilization.
Main Oscillator without prescaler. The PMC Status Register is polled to wait for MCK
Ready. PCK and MCK are now the Main Oscillator clock.
ROM to RAM). Zero-initialized data are set to 0 in RAM.
SAM-BA Monitor. Its configuration depends on the Main Oscillator source (external
clock or crystal) and on its frequency.
SAM9G45
59

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