SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 900

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

39.5.14
Register Name:
Access Type:
Reset Value:
• DIS_DONE: Module Disable Operation Completed
0: The disable completed interrupt is disabled.
1: The disable completed interrupt is enabled.
• SRST: Software Reset Completed
0: The software reset completed interrupt is disabled.
1: The software reset completed interrupt is enabled.
• VSYNC: Vertical Synchronization
0: The vertical synchronization interrupt is enabled.
1: The vertical synchronization interrupt is disabled.
• PXFR_DONE: Preview DMA Transfer Interrupt
0: The Preview DMA transfer completed interrupt is enabled
1: The Preview DMA transfer completed interrupt is disabled
• CXFR_DONE: Codec DMA Transfer Interrupt
0: The Codec DMA transfer completed interrupt is enabled
1: The Codec DMA transfer completed interrupt
• P_OVR: FIFO Preview Overflow
0: The preview FIFO overflow interrupt is disabled.
1: The preview FIFO overflow interrupt is enabled.
• P_OVR: FIFO Codec Overflow
0: The codec FIFO overflow interrupt is disabled.
1: The codec FIFO overflow interrupt is enabled.
900
31
23
15
–
–
–
7
–
SAM9G45
ISI Interrupt Mask Register
30
22
14
–
–
–
6
–
ISI_IMR
Read-write
0x0
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
FR_OVR
27
19
11
–
–
3
–
CRC_ERR
VSYNC
SRST
26
18
10
–
2
CXFR_DONE
DIS_DONE
C_OVR
25
17
9
–
1
6438G–ATARM–19-Apr-11
PXFR_DONE
P_OVR
24
16
8
–
0
–