SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 959

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 41-5. Multi Buffer Transfer Using Linked List
6438G–ATARM–19-Apr-11
DSCRx(0)
DSCRx(1)
CTRLBx
CTRLAx
DADDRx
SADDRx
The Linked List multi-buffer transfer is initiated by programming DMAC_DSCRx with DSCRx(0)
(LLI(0) base address) and DMAC_CTRLBx register with both SRC_DSCR and DST_DSCR set
to 0. Other fields and registers are ignored and overwritten when the descriptor is retrieved from
memory.
The last transfer descriptor must be written to memory with its next descriptor address set to 0.
= DSCRx(0) + 0xC
= DSCRx(0) + 0x8
= DSCRx(0) + 0x4
LLI(0)
= DSCRx(0) + 0x0
= DSCRx(0) + 0x10
System Memory
DSCRx(1)
DSCRx(2)
CTRLBx
CTRLBx
DADDRx
SADDRx
LLI(1)
= DSCRx(1) + 0xC
= DSCRx(1) + 0x8
= DSCRx(1) + 0x4
= DSCRx(1) + 0x0
= DSCRx(1) + 0x10
DSCRx(2)
(points to 0 if
LLI(1) is the last
transfer descriptor
SAM9G45
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