SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 473

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

30.6.31
Register Name:
Addresses:
Access Type:
Reset Value:
• WPEN: Write Protect Enable
0 = Disables the Write Protect if WPKEY corresponds to 0x50494F (“PIO” in ASCII).
1 = Enables the Write Protect if WPKEY corresponds to 0x50494F (“PIO” in ASCII).
Protects the registers listed below:
• WPKEY: Write Protect KEY
Should be written at value 0x534D43 (“SMC” in ASCII). Writing any other value in this field aborts the write operation of the
WPEN bit. Always reads as 0.
6438G–ATARM–19-Apr-11
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“PIO Enable Register” on page 458
“PIO Disable Register” on page 458
“PIO Output Enable Register” on page 459
“PIO Output Disable Register” on page 460
“PIO Input Filter Enable Register” on page 461
“PIO Input Filter Disable Register” on page 461
“PIO Set Output Data Register” on page 462
“PIO Clear Output Data Register” on page 463
“PIO Multi-driver Enable Register” on page 466
“PIO Multi-driver Disable Register” on page 467
“PIO Pull Up Disable Register” on page 468
“PIO Pull Up Enable Register” on page 468
“PIO Peripheral A Select Register” on page 469
“PIO Peripheral B Select Register” on page 470
“PIO Output Write Enable Register” on page 471
“PIO Output Write Disable Register” on page 471
31
23
15
—
7
PIO Write Protect Mode Register
30
22
14
—
0xFFFFF2E4 (PIOA), 0xFFFFF4E4 (PIOB), 0xFFFFF6E4 (PIOC), 0xFFFFF8E4 (PIOD),
0xFFFFFAE4 (PIOE)
Read-write
See
6
PIO_WPMR
Table 30-2
29
21
13
—
5
28
20
12
—
4
WPKEY
WPKEY
WPKEY
27
19
11
—
3
26
18
10
—
2
25
17
—
9
1
SAM9G45
WPEN
24
16
8
0
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