SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 1053

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

43.8.9
Register Name:AC97C_CBSR
Address:
Access Type: Read-only
• TXRDY: Channel Transmit Ready
0: Data has been loaded in Channel Transmit Register and is waiting to be loaded in the Channel Transmit Shift Register.
1: Channel Transmit Register is empty.
• TXEMPTY: Channel Transmit Empty
0: Data remains in the Channel Transmit Register or is currently transmitted from the Channel Transmit Shift Register.
1: Data in the Channel Transmit Register have been loaded in the Channel Transmit Shift Register and sent to the codec.
• UNRUN: Transmit Underrun
Active only when Variable Rate Mode is enabled (VRA bit set in the AC97C_MR register). Automatically cleared by a pro-
cessor read operation.
0: No data has been requested from the channel since the last read of the Status Register, or data has been available each
time the CODEC requested new data from the channel since the last read of the Status Register.
1: Data has been emitted while no valid data to send has been previously loaded into the Channel Transmit Shift Register
since the last read of the Status Register.
• RXRDY: Channel Receive Ready
0: Channel Receive Holding Register is empty.
1: Data has been received and loaded in Channel Receive Holding Register.
• OVRUN: Receive Overrun
Automatically cleared by a processor read operation.
0: No data has been loaded in the Channel Receive Holding Register while previous data has not been read since the last
read of the Status Register.
1: Data has been loaded in the Channel Receive Holding Register while previous data has not yet been read since the last
read of the Status Register.
• ENDTX: End of Transmission for Channel B
0: The register AC97C_CBTCR has not reached 0 since the last write in AC97C_CBTCR or AC97C_CBNCR.
1: The register AC97C_CBTCR has reached 0 since the last write in AC97C_CBTCR or AC97C_CBTNCR.
6438G–ATARM–19-Apr-11
RXBUFF
31
23
15
–
–
7
–
AC97 Controller Channel B Status Register
0xFFFAC038
ENDRX
30
22
14
–
–
6
–
OVRUN
29
21
13
–
–
–
5
RXRDY
28
20
12
–
–
–
4
27
19
11
–
–
–
3
–
TXBUFE
UNRUN
26
18
10
–
–
2
TXEMPTY
ENDTX
25
17
–
–
9
1
SAM9G45
TXRDY
24
16
–
–
8
–
0
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