SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 197

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 21-15. WRITE_MODE = 0. The write operation is controlled by NCS
21.8.5
Table 21-4.
21.8.6
6438G–ATARM–19-Apr-11
Coded Value
setup [5:0]
pulse [6:0]
cycle [8:0]
Coding Timing Parameters
Reset Values of Timing Parameters
Coding and Range of Timing Parameters
NWR0, NWR1,
NWR2, NWR3
NBS0, NBS1,
NBS2, NBS3,
A0, A1
Number of Bits
D[31:0]
A
NWE,
[25:2]
MCK
All timing parameters are defined for one chip select and are grouped together in one
SMC_REGISTER according to their type.
The SMC_SETUP register groups the definition of all setup parameters:
• NRD_SETUP, NCS_RD_SETUP, NWE_SETUP, NCS_WR_SETUP
The SMC_PULSE register groups the definition of all pulse parameters:
• NRD_PULSE, NCS_RD_PULSE, NWE_PULSE, NCS_WR_PULSE
The SMC_CYCLE register groups the definition of all cycle parameters:
• NRD_CYCLE, NWE_CYCLE
Table 21-4
Table 21-8
NCS
6
7
9
shows how the timing parameters are coded and their permitted range.
gives the default value of timing parameters at reset.
256 x cycle[8:7] + cycle[6:0]
128 x setup[5] + setup[4:0]
256 x pulse[6] + pulse[5:0]
Effective Value
Coded Value
0
0
0
127
31
63
Permitted Range
SAM9G45
Effective Value
0
0
0
0
0
256+127
512+127
768+127
128+31
256+63
197