SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 930

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

40.10.4
930
SAM9G45
Manual Mode
The Trigger Counter is cleared when TSAMOD is written to define the Interleaved Mode, then it
simply rolls over.
The TSADCC features a manual mode allowing to control the state (open/close) of the four
switches.
Writing TSAMOD to “Manual Mode” automatically enables the ADC pins as analog inputs.The
switches positions are controlled through the
this mode, the “Sample and Hold Time” used is the one defined for the Touchscreen mode
(TSSHTIM).
To perform a measurement, the following sequence must be followed
• For Trigger Counter at 5:
1. Close the switches on the inputs Y
2. Convert Channel Y
3. If Channel 4 to Channel 7 are enabled, convert Channels and store result in the corre-
4. Set Trigger Counter to 6.
• For Trigger Counter at 6:
1. Close the switches on the inputs Y
2. Convert Channel Y
3. If Channel 4 to Channel 7 are enabled, convert Channels and store result in the corre-
4. Set Trigger Counter to 7.
• For Trigger Counter at 7:
1. Close the switches on the inputs Y
2. Convert Channel X
3. If Channel 4 to Channel 7 are enabled, convert Channels and store result in the corre-
4. Set Trigger Counter to 8.
• For Trigger Counter between 8 and (2
1. Increment Trigger Counter.
2. If Trigger Counter equals (2
3. If Channel 4 to Channel 7 are enabled, convert Channels and store result in the corre-
1. Select the switch (switches) to close.
2. If SLEEP is set, wake up the ADC cell and wait for the Startup Time.
TSADCC_XPDR in TSADCC_LCDR if PDCEN is enabled).
sponding TSADCC_CDRx and TSADCC_LCDR.
result in TSADCC_CDR2 (and also in TSADCC_LCDR if PDCEN is enabled).
sponding TSADCC_CDRx and TSADCC_LCDR.
result in TSADCC_CDR3 (and also in TSADCC_LCDR if PDCEN is enabled).
sponding TSADCC_CDRx and TSADCC_LCDR.
sponding TSADCC_CDRx and TSADCC_LCDR.
P
P
M
, subtract TSADCC_CDR3 from the result and store the subtraction
, subtract TSADCC_CDR3 from the result and store the subtraction
and store the result in TSADCC_CDR3 (and store content of
TSFREQ+1
P
P
P
TSFREQ+1
), then set Trigger Counter to 0.
and Y
and Y
and Y
“TSADCC Manual Switch Command
M
M
M
):
during the Sample and Hold Time.
during the Sample and Hold Time.
during the Sample and Hold Time
6438G–ATARM–19-Apr-11
Register”. In