tm1300 NXP Semiconductors, tm1300 Datasheet - Page 120

• Manufacturer Part Number: tm1300
• Description: Tm-1300 Media Processor
• Manufacturer: NXP Semiconductors

TM1300 Data Book
Table 7-5. VO_STATUS — status register fields
new TM1300 features that are selectively enabled by
EVO_CTL (see
7.16.3.1
The frame timing for 525/60 and 625/50 timing cases is
shown pictorially in
tions are used.
7.16.4
New TM1300 EVO features are enabled by setting the
7-16
CUR_Y
CUR_X
BFR1_EMPTY
BFR2_EMPTY
HBE
1
YTR
URUN
FIELD2
VBLANK
Field
EVO Control Register (EVO_CTL)
Frame and field timing control
Current Y.
Image line index of the current line in the current field being output by the EVO. CUR_Y reflects the current state of
the Image Line Counter. CUR_X and CUR_Y form a single 24-bit output data byte counter (CUR_X is the counter
LSBs) when the EVO is in data-streaming or message-passing mode. This counter reflects the status of the SIZE
counter for the currently active buffer. The two LSBs of this counter are not valid for reading during transfers; only
the upper 22 bits (the word count) are valid.
Current X.
Image pixel index of the most-recently-output pixel. CUR_X reflects the current state of the Image Pixel Counter.
Buffers 1 and 2 Empty.
These bits are valid in video-refresh, data-streaming and message-passing modes.
• In video-refresh modes, only Buffer 1 is used. BFR1_EMPTY indicates that the last byte of a field has been
• In data-streaming mode, BFR1_EMPTY and BFR2_EMPTY indicate that the last byte in their corresponding
• In message passing mode, BFR1_EMPTY signals completion of message transmission.
These bits cause an interrupt if their interrupt-enable bits are set. One interrupt per buffer is signaled.
Highway Bandwidth Error.
HBE is set when the highway fails to respond in time to a highway read request and data was not ready in time to be
set on EVO data lines. HBE can be set in both image- and data-transfer modes. HBE indicates insufficient band-
width was requested from the highway arbiter.
EVO unit indicator.
This bit allows software to determine if the unit is an EVO (containing extra MMIO registers) or a TM1000 VO unit.
In the TM1000, this bit is a copy of the HBE flag. In the EVO unit, it is hard-wired to ‘1’. Software can easily deter-
mine the type of video output unit by clearing the HBE bit then reading this bit.
Y threshold.
In video-refresh modes, YTR indicates that the Image Line Counter value is equal to the Y_THRESHOLD value in
VO_YTHR. The Y_THRESHOLD value can be set to provide an interrupt on any line in the valid image area.
Underrun.
In video-refresh and data-streaming mode, this bit indicates that the CPU did not perform an acknowledge to indi-
cate updated address pointers for the next field or buffer in time for continuous image or data transfer. URUN
causes an interrupt if the corresponding interrupt-enable condition is set.
• In video-refresh modes, URUN indicates that the SAV code marking beginning of active video has been gener-
• In data-streaming mode, URUN indicates the last byte in the active buffer was transferred, and no BFR1_ACK or
Field 2 or Buffer 2 active.
• In data-streaming mode, FIELD2 = 0 when Buffer 1 is active; FIELD2 = 1 when Buffer 2 is active.
• In video-refresh modes, FIELD2 indicates that the EVO is actively sending out a video image for Field 2, as
Vertical blanking.
Indicates that the EVO is in a vertical-blanking interval. VBLANK is asserted only in video-refresh modes.
Section
transferred. It is actually raised at the completion of the transmission of the Overlap area of the field, as shown in
Figure
BFR1_ACK. If BFR1_EMPTY is not cleared by BFR1_ACK before the active video area of the next field starts to
be emitted, the EVO sets the URUN bit.
buffer has been transferred. When BFR1_EMPTY or BFR2_EMPTY is set, transfer stops from the corresponding
buffer.
ated without BFR1_ACK being set by the CPU. (Setting BFR1_ACK to ‘1’ clears BFR1_EMPTY). In this case,
video refresh continues with previous address pointers.
BFR2_ACK occurred to enable the next buffer. In this case, transfer continues with previous address pointers.
defined by
Figure
7.16.4).
7-30. At this point, software should assign a new field of imagery to {Y,U,V}_BASE_ADR and perform a
PRODUCT SPECIFICATION
7-30. CCIR 656 line defini-
Figure
7-30.
Description
7.16.3.2
The recommended values for the various fields of the
timing registers are shown in
625/50 timing cases. The FREQUENCY field value
shown is for 27 MHz assuming a DSPCPU clock of
143 MHz.
appropriate fields of the EVO_CTL register shown in
Figure
7-26. The register fields are described in
Recommended values for timing
registers
Philips Semiconductors
Table 7-10
for 525/60 and