tm1300 NXP Semiconductors, tm1300 Datasheet - Page 99
tm1300
Manufacturer Part Number
tm1300
Description
Tm-1300 Media Processor
Manufacturer
NXP Semiconductors
Datasheet
1.TM1300.pdf
(533 pages)
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Philips Semiconductors
6.4
Halfres capture mode is identical in operation to fullres
capture mode except that horizontal resolution is re-
duced by a factor of two on both luminance and chromi-
nance data.
Referring to
grammed to capture HEIGHT lines of WIDTH pixels in
halfres mode, the resulting captured planar data is as
shown in
WIDTH/4 chrominance samples are captured. In this
mode, START_X and WIDTH must be a multiple of four.
Horizontal-resolution reduction is performed as shown in
Figure 6-13
ventions of the pixels in memory depends on the SC
(sampling convention) bit in the VI_CTL register. Assum-
ing that the camera sampling positions obey the conven-
tions shown in
are supported in memory:
• If SC=0, co-sited luminance and chrominance sam-
• If SC=1, interspersed chrominance samples result,
Figure 6-14. Halfres interspersed sample capture.
Figure 6-13. Halfres co-sited sample capture.
ples result as shown in
sponds to the standard YUV 4:2:2 sampling
conventions.
as shown in
HALFRES CAPTURE MODE
Figure
or
Figure 6-9
Figure
Figure
6-12. Note that WIDTH/2 luminance and
Figure
6-14. The spatial sampling con-
6-5, two possible spatial formats
6-14. This form is (after vertical
YUV 4:2:2 CCIR656
YUV 4:2:2 CCIR656
and
Halfres capture
Halfres capture
sample results
sample results
input samples
input samples
Figure
Figure
6-11, if VI is pro-
6-13. This corre-
a
a
b
b
c
c
d
d
e
e
f
f
g
g
The filtering process applies mirroring at the edge of the
active video area, as per
For both filters, computed video data is clamped to 01h if
result of the filter is less than 01h and clamped to FFh if
greater than FFh.
6.5
All raw capture modes (raw8, raw10s and raw10u) be-
have similarly. VI_DATA information is captured at the
rate of the sender’s clock, without any interpretation or
start/stop of capture on the basis of the data values. Any
clock cycle in which VI_DVALID is asserted leads to the
capture of one data sample. Samples are 8 or 10 bits
long (raw8 versus raw10 modes). For the 8-bit capture
mode, four samples are packed to a word. For the 10-bit
capture modes, two 16-bit samples are packed to a
word. The extension from 10 to 16 bits uses sign exten-
sion (raw10s) or zero extension (raw10u).
For 8-bit and 16-bit capture, successive captured values
are written to increasing memory addresses. For 16-bit
PRODUCT SPECIFICATION
h
h
subsampling of the chroma components) identical to
the MPEG-1 sampling conventions. If vertical sub-
sampling is desired, it can either be performed in
software on the DSPCPU or in hardware by the ICP.
Y g '
Y h '
i
i
V f '
U f '
V f '
U f '
RAW CAPTURE MODES
=
=
=
j
=
=
j
=
–
–
–
–
–
k
–
k
3 Y
3 Y
3 V
3 U
3 V
3 U
e
d
c
l
c
l
c
c
+
+
+
+
+
+
19 Y
19 Y
19 V
19 U
19 V
19 U
g
f
e
e
e
e
+
+
+
+
+
+
32 Y
32 Y
19 V
19 U
19 V
19 U
Figure
g
h
g 3 V i
g 3 U i
g 3 V i
g 3 U i
+
+
–
–
–
–
19 Y
19 Y
6-7.
h 3 Y j
i
–
–
32
32
32
32
3 Y
k
64
64
Video In
6-9
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