tm1300 NXP Semiconductors, tm1300 Datasheet - Page 122

• Manufacturer Part Number: tm1300
• Description: Tm-1300 Media Processor
• Manufacturer: NXP Semiconductors

TM1300 Data Book
Table 7-6. VO_CTL register fields
7-18
SYNC_MASTER
VO_IO1_POS
VO_IO2_POS
OL_EN
MODE
BFR1_ACK
BFR2_ACK
HBE_ACK
URUN_ACK
YTR_ACK
BFR1_INTEN
BFR2_INTEN
HBE_INTEN
URUN_INTEN
YTR_INTEN
LTL_END
VO_ENABLE
Field
Sync master.
• When set, VO_IO1 and VO_IO2 are outputs. In video-refresh modes, the EVO generates horizontal and frame
• When zero, VO_IO2 is an input. (Hardware reset default.) In video-refresh modes, VO_IO2 serves as the frame
Polarity of VO_IOx_POS.
VO_IO1_POS currently has no function.
VO_IO2_POS determines the input polarity of VO_IO2.
• When ‘0’, the corresponding input triggers on the negative (high-to-low) transition of the input signal.
• When ‘1’, the input triggers on the positive (low-to-high) transition.
Overlay Enable.
Enables the YUV overlay function in video-refresh modes.
Major operating mode.
Defines the video output major operating mode, as listed in
Buffer 1 and Buffer 2 acknowledge.
When active in data-transfer modes, writing a ‘1’ to BFR1_ACK clears BFR1_EMPTY and enables Buffer 1 for
transfer until BFR1_EMPTY is set. Writing a ‘0’ to BFR1_ACK has no effect. BRF2_ACK operates similarly for
Buffer 2. Writing a ‘1’ to VO_ENABLE in data-streaming mode is the same as writing a ‘1’ to both BFR1_ACK and
BFR2_ACK, and enables both buffers 1 and 2 for transfer. Writing a ‘1’ to VO_ENABLE in message-passing mode
is the same as writing a ‘1’ to BFR1_ACK, and enables Buffer 1 for transfer. BFR2_ACK is not used in message-
passing mode, since only Buffer 1 is used.
Acknowledge HBE or URUN.
Writing a ‘1’ to these bits clears the HBE or URUN flags and resets their corresponding interrupt conditions.
Acknowledge Y threshold.
Writing a ’1’ to this bit clears the YTR flag and resets its interrupt condition. YTR signals the CPU to set new point-
ers for the next field. If YTR_ACK is not received by the time the active image area for the next field starts, the
URUN flag is set. Data transfer continues with the old pointer values.
Enable interrupt conditions.
Enable corresponding interrupts to be generated when the BFR1_EMPTY, BFR2_EMPTY, HBE, URUN (under-
run/end of transfer), and YTR (end of field/buffer) flags are set, respectively.
Note: BFR2_INTEN, URUN_INTEN, YTR_INTEN must be 0 in message passing mode.
Little-endian.
Specifies that data in SDRAM is stored in little-endian format. This only affects the overlay packed-image format
interpretation in video-refresh modes. Refer to
Enable the EVO to send image data or message data to its output.
Note: This bit should not be simultaneously asserted with the RESET bit. The correct sequence to reset and
enable the EVO is as follows.
• Set all VO_CTL control fields as desired, writing VO_CTL with RESET = 1, VO_ENABLE = 0.
• Retain all desired values of control fields, but rewrite VO_CTL with RESET = 0, VO_ENABLE = 0.
• Finally, still retaining all desired control fields, rewrite VO_CTL with RESET = 0, VO_ENABLE = 1.
Setting VO_ENABLE in video-refresh modes starts the EVO sending image data beginning with the first pixel in
the image. Setting VO_ENABLE in data-streaming and message-passing modes starts the EVO sending data
beginning with the first byte in Buffer 1. In video-refresh and data-streaming modes, VO_ENABLE remains set until
cleared by the CPU. In message-passing mode, VO_ENABLE is cleared when BFR1_EMPTY is set, indicating the
end of message transfer.
Note: De-asserting VO_ENABLE in video-refresh modes causes SDRAM reads to stop, but sync framing and
BFR1_EMPTY generation and interrupts remain fully operational. The transmitted active image data is undefined
in this case. To fully halt video output, a software reset is required.
timing signals on VO_IO1 and VO_IO2 respectively. In message-passing mode and data-streaming mode, this
bit should always be set so that VO_IO1 and VO_IO2 generate START and END message signals respectively.
time reference. The active edge is selected by VO_IO2_POS.
PRODUCT SPECIFICATION
Appendix C, “Endian-ness,”
Description
Table 7-4 on page
for details on byte ordering.
7-13.
Philips Semiconductors