tm1300 NXP Semiconductors, tm1300 Datasheet - Page 417

• Manufacturer Part Number: tm1300
• Description: Tm-1300 Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
32-bit load with scaled index
SYNTAX
FUNCTION
DESCRIPTION
result in r dest . If the memory address computed by r src1 + 4 r src2 is not a multiple of 4, the result of
undefined but no exception will be raised. This load operation is performed as little-endian or big-endian depending on
the current setting of the bytesex bit in the PCSW.
memory operations is undefined). The state of the BSX bit in the PCSW has no effect on MMIO access by
modification of the destination register and the occurrence of side effects. If the LSB of r guard is 1, r dest is written and
the data cache status bits are updated if the addressed locations are cacheable. if the LSB of r guard is 0, r dest is not
changed and
EXAMPLES
r10 = 0xcfc, r30 = 0x1,
[0xd00] = 0x84, [0xd01] = 0x33,
[0xd02] = 0x22, [0xd03] = 0x11
r50 = 0, r40 = 0xd0c, r20 = 0xfffffffe,
[0xd04] = 0x48, [0xd05] = 0x66,
[0xd06] = 0x55, [0xd07] = 0x44
r60 = 1, r40 = 0xd0c, r20 = 0xfffffffe,
[0xd04] = 0x48, [0xd05] = 0x66,
[0xd06] = 0x55, [0xd07] = 0x44
r70 = 0xd01, r30 = 0x1
The
The
The
[ IF r guard ] ld32x r src1 r src2
if r guard then {
}
if PCSW.bytesex = LITTLE_ENDIAN then
else
r dest <7:0>
r dest <15:8>
r dest <23:16>
r dest <31:24>
ld32x
ld32x
ld32x
bs
bs
3
0
Initial Values
ld32x
operation can be used to access the MMIO address aperture (the result of MMIO access by 8- or 16-bit
operation loads the 32-bit memory value from the address computed by r src1 + 4 r src2 and stores the
operation optionally takes a guard, specified in r guard . If a guard is present, its LSB controls the
mem[r src1 + (4
mem[r src1 + (4
mem[r src1 + (4
mem[r src1 + (4
has no side effects whatever.
r src2 ) +(3
r src2 ) + (2
r src2 ) + (1
r src2 ) + (0
ld32x r10 r30
IF r50 ld32x r40 r20
IF r60 ld32x r40 r20
ld32x r70 r30
bs)]
bs)]
bs)]
bs)]
r dest
Operation
r100
r110
PRODUCT SPECIFICATION
r80
r90
r100
no change, since guard is false
r90
r110 undefined, since 0xd01 + 4 1 is not a
multiple of 4
DSPCPU Operations for TM1300
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
0x48665544
0x84332211
ld32 ld32d ld32r st32
st32d h_st32d
ATTRIBUTES
SEE ALSO
Result
ld32x
ld32x
ld32x
dmem
201
4, 5
No
—
2
3
A-131
.
is