tm1300 NXP Semiconductors, tm1300 Datasheet - Page 355

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tm1300

Manufacturer Part Number
tm1300
Description
Tm-1300 Media Processor
Manufacturer
NXP Semiconductors
Datasheet

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Part Number:
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Philips Semiconductors
Hardware 16-bit store with displacement
SYNTAX
FUNCTION
DESCRIPTION
the address in r src2 + d . The d value is an opcode modifier, must be in the range –128 and 126 inclusive, and must be
a multiple of 2. This store operation is performed as little-endian or big-endian depending on the current setting of the
bytesex bit in the PCSW.
is undefined, and the MSE (Misaligned Store Exception) bit in the PCSW register is set to 1. Additionally, if the
TRPMSE (TRaP on Misaligned Store Exception) bit in PCSW is 1, exception processing will be requested on the next
interruptible jump.
modification of the addressed memory locations (and the modification of cache if the locations are cacheable). If the
LSB of r guard is 1, the store takes effect. If the LSB of r guard is 0, h_st16d has no side effects whatever; in particular,
the LRU and other status bits in the data cache are not affected.
EXAMPLES
r10 = 0xcfe, r80 = 0x44332211
r50 = 0, r20 = 0xd05,
r70 = 0xaabbccdd
r60 = 1, r30 = 0xd06,
r70 = 0xaabbccdd
The
If
The
[ IF r guard ] h_st16d( d ) r src1 r src2
if r guard then {
}
h_st16d
if PCSW.bytesex = LITTLE_ENDIAN then
else
mem[r src2 + d + (1
mem[r src2 + d + (0
h_st16d
h_st16d
bs
bs
1
0
Initial Values
is misaligned (the memory address computed by r src2 + d is not a multiple of 2), the result of
operation stores the least-significant 16-bit halfword of r src1 into the memory locations pointed to by
operation optionally takes a guard, specified in r guard . If a guard is present, its LSB controls the
bs)]
bs)]
r src1 <7:0>
r src1 <15:8>
h_st16d(2) r80 r10
IF r50 h_st16d(–4) r70 r20
IF r60 h_st16d(–4) r70 r30
Operation
PRODUCT SPECIFICATION
[0xd00]
no change, since guard is false
[0xd02]
DSPCPU Operations for TM1300
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
st16 st16d st8 st8d st32
st32d readpcsw ijmpf
0x22, [0xd01]
0xcc, [0xd03]
ATTRIBUTES
SEE ALSO
Result
h_st16d
0xdd
0x11
–128..126 by 2
h_st16d
dmem
7 bits
4, 5
n/a
30
2
A-69

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