tm1300 NXP Semiconductors, tm1300 Datasheet - Page 466

• Manufacturer Part Number: tm1300
• Description: Tm-1300 Media Processor
• Manufacturer: NXP Semiconductors

TM1300 Data Book
ufloatrz
SYNTAX
FUNCTION
DESCRIPTION
and writes the result into r dest . Rounding is performed toward zero; the IEEE rounding mode bits in PCSW are
ignored. This is the preferred rounding mode for ANSI C. If
the corresponding exception flags in the PCSW are set. The PCSW exception flags are sticky: the flags can be set as
a side-effect of any floating-point operation but can only be reset by an explicit
the PCSW exception flags occurs at the same time as r dest is written. If any other floating-point compute operations
update the PCSW at the same time, the net result in each exception flag is the logical OR of all simultaneous updates
ORed with the existing PCSW value for that exception flag.
modification of the destination register. If the LSB of r guard is 1, r dest and the exception flags in PCSW are written;
otherwise, r dest is not changed and the operation does not affect the exception flags in PCSW.
EXAMPLES
A-180
r30 = 3
r40 = 0xffffffff (4294967295)
r10 = 0, r50 = 0xfffffffd
r20 = 1, r50 = 0xfffffffd
r60 = 0x7fffffff (2147483647)
r70 = 0x80000000 (2147483648)
r80 = 0x7ffffff1 (2147483633)
The
The
The
[ IF r guard ] ufloatrz r src1
if r guard then {
}
r dest
ufloatrz
ufloatrzflags
ufloatrz
Initial Values
(float) ((unsigned long)r src1 )
operation converts the unsigned integer value in r src1 to single-precision IEEE floating-point format
operation optionally takes a guard, specified in r guard . If a guard is present, its LSB controls the
PRODUCT SPECIFICATION
operation computes the exception flags that would result from an individual
ufloatrz r30
ufloatrz r40
IF r10 ufloatrz r50
IF r20 ufloatrz r50
ufloatrz r60
ufloatrz r70
ufloatrz r80
Convert unsigned integer to floating-point with
r dest
Operation
r100
r105
r117
r120
r122
ufloatrz
r110
r115
r100
r105
no change, since guard is false
r115
r117
r120
r122
causes an IEEE exception, such as inexact,
writepcsw
0x40400000 (3.0)
0x4f7fffff (4.294967040e+9), INX flag set
0x4f7fffff (4.294967040e+9), INX flag set
0x4effffff (2.147483520e+9), INX flag set
0x4f000000 (2.147483648e+9)
0x4effffff (2.147483520e+9), INX flag set
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
rounding toward zero
ifloatrz ifloat ufloat
ifixieee ufloatflags
Philips Semiconductors
Result
ATTRIBUTES
operation. The update of
SEE ALSO
ufloatrz
falu
119
1, 4
No
—
1
3
.