tm1300 NXP Semiconductors, tm1300 Datasheet - Page 197

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tm1300

Manufacturer Part Number
tm1300
Description
Tm-1300 Media Processor
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
13.6
Figure 13-3
for three types of read accesses supported by I
EEPROMs. A read from the address currently latched in-
side the EEPROM can be for either a single byte or for
an arbitrary series of sequential bytes. The master
makes the choice by setting the ACK bit after a byte has
been transferred.
Figure 13-3. Protocols supported by the boot block for reading the EEPROM
EEPROM ACCESS PROTOCOLS
Current-Address Read
SDA Line Protocol:
SDA Line Protocol:
SDA Line Protocol:
shows the SDA (serial data) line protocols
Sequential Read
Random Read
S
T
A
R
T
S
T
A
R
T
S
T
A
R
T
1 0 1 0
1 0 1 0
Device Address
Device Address
1 0 1 0
Device Address
D
A
A
0
0
Dummy Write
A
P
A
P
0
0
0
P
P
A
P
0
0
0
W
P
R
T
E
R
E
A
D
0
I
R
E
A
D
A
C
K
A
C
K
W
A
C
K
A
D
7
7
2
W
D
A
D
7
6
6
C serial
W
D
A
D
6
5
5
Data n
W
D
A
D
5
4
4
Data n
W
D
A
D
4
3
3
W
D
A
D
3
2
2
W
D
A
D
2
1
1
W
D
A
D
1
0
0
D
A
C
K
A
C
K
0
N
O
A
C
K
S
A
R
D
A random-access read is accomplished by performing a
dummy write, which overwrites the latched address
stored inside the EEPROM. Once the internal address
latch is set to the desired value, one of the other two read
protocols can be used to read one or more bytes.
The boot logic inside TM1300 uses a single random read
transaction to location 0 of device address 1010000 fol-
lowed by a sequential read extension to read all required
EEPROM bytes in a single pass.
T
T
7
PRODUCT SPECIFICATION
S
O
P
D
T
1 0 1 0
6
Device Address
Data n+1
D
5
D
4
D
3
D
A
0
2
D
P
1
1
D
P
0
0
R
D
C
E
A
A
K
C
D
A
K
7
D
D
7
6
Data n+2
D
D
6
5
D
D
5
4
D
D
4
3
D
3
D
2
D
2
D
1
D
1
D
0
D
0
A
C
K
O
N
A
C
K
D
7
O
S
T
P
D
6
Data n+3
D
5
D
4
D
3
D
2
System Boot
D
1
D
0
N
O
A
C
K
S
T
O
P
13-9

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