tm1300 NXP Semiconductors, tm1300 Datasheet - Page 126

• Manufacturer Part Number: tm1300
• Description: Tm-1300 Media Processor
• Manufacturer: NXP Semiconductors

TM1300 Data Book
The VO_CLK signal is normally set as an output to drive
the data transfer for all modes at a programmable rate.
The VO_CLK signal can be an input or output, as con-
trolled by the VO_CTL.CLKOUT bit. When CLKOUT = 1,
VO_CLK is an output, and its frequency is set by the
VO_CLOCK
VO_CLK is an input and the EVO generates data at the
clock rate of the sender.
In video-refresh modes, the EVO receives or generates
horizontal and frame synchronization signals on the
VO_IO1 and VO_IO2 lines, as described in
7.17.1
In video-refresh mode, the EVO transfers an image from
SDRAM to the EVO port. The VO_CTL.MODE field de-
fines the video image memory data format and deter-
mines whether the EVO is to perform horizontal upscal-
ing (see
data in YUV 4:2:2 co-sited, YUV 4:2:2 interspersed and
YUV 4:2:0 formats, and generates a CCIR 656-compati-
ble, YUV 4:2:2 co-sited image output stream. Scaling is
identified by the YUV-1 and YUV-2 modes. In YUV-1
modes, luminance and chrominance pass unmodified. In
YUV-2 modes, luminance and chrominance are hori-
zontally upscaled by a factor of two.
During video refresh, the VO_STATUS.YTR bit is set
when
Y_THRESHOLD value. When an image field has been
transferred, the VO_STATUS.BFR1_EMPTY bit is set.
The DSPCPU is interrupted when either the YTR or
BFR1_EMPTY flag is set and its corresponding interrupt
is enabled. To maintain continuous transfer of image
fields, the DSPCPU supplies new pointers for the next
field following each BFR1_EMPTY interrupt. If the
DSPCPU does not supply new pointers before the next
field, the URUN bit is set, and the EVO uses the same
pointer values until they are updated.
Graphics Overlay
The graphics overlay is enabled by the VO_CTL.OL_EN
bit. The graphics overlay is typically a software-generat-
ed graphic overlaid onto the output video image stream.
The graphics overlay is either generated in YUV by the
DSPCPU or converted by the DSPCPU from an RGB to
a YUV overlay image. Because RGB-to-YUV conversion
can potentially lose information, this conversion is done
by the DSPCPU, because it has the most information
about how best to perform this conversion in the most ef-
fective manner.
The overlay height should be chosen such that the over-
lay does not vertically extend beyond the image area. A
height greater than this causes undefined results and
may result in vertical overlay wraparound.
Note: The emitted byte data rate is limited to 45% of the
SDRAM clock when overlays are enabled.
The YUV overlay logic assembles the U0, Y0, V0, Y1
bytes for a pair of YUV 4:2:2 pixels for both the main im-
age and the overlay image. The alpha bit for pixel 0 (the
LSB of the U0 byte of the overlay image) selects
7-22
the
Table
Video Refresh Modes
Image
register
7-4). The EVO accepts memory image
Line
value.
PRODUCT SPECIFICATION
Counter
When
reaches
CLKOUT = 0,
Section 7.9.4
the
ALPHA_ZERO or ALPHA_ONE as the alpha source,
and the alpha blend logic combines U0, Y0, and V0 from
the main and overlay images to generate the U0, Y0 and
V0 output values. The alpha bit for pixel 1 (the LSB of the
V0 byte of the overlay image) selects ALPHA_ZERO or
ALPHA_ONE as the alpha source for blending the Y1
pixels to generate the Y1 output value. The alpha blend-
ed U0, Y0, V0 and Y1 bytes are sent to the EVO output
port in the YUV 422 sequence. The overlay U and V val-
ues used assume an LSB of zero.
Video Image Addressing
The output image is read from SDRAM at a location de-
fined by Y_BASE_ADR, Y_OFFSET, U_BASE_ADR,
U_OFFSET, V_BASE_ADR, and V_OFFSET. The de-
fault memory packing is big-endian although little-endian
packing
VO_CTL.LTL_END bit.
Horizontally-adjacent samples are stored at successive
byte addresses, resulting in a packed form (four 8-bit
samples are packed into one 32-bit word). Upon horizon-
tal retrace, the starting byte address for the next line is
computed by adding the corresponding offset value to
the previous line’s starting byte address. Note that
{OL,Y,U,V}_OFFSET values are 16-bit unsigned quanti-
ties. This process continues until the total image—height
in lines and width in pixels per line—has been read from
memory for luminance (Y). For chrominance, the same
number of lines are read, but half the number of pixels
per line are read in YUV 4:2:2 and YUV 4:2:0 formats
The YUV 4:2:0 format has half the number of U and V
lines in memory that the YUV 4:2:2 formats have, but
each line of U and V data is read and used twice. See
Figure 7-19
7.17.2
In data-streaming and message-passing modes, the
EVO
VO_DATA[7:0] lines at rates up to 81 MHz.
Note: In the TM1300, the data-rate is limited to an 81-
MHz EVO clock.
Data is read from SDRAM in packed form (four 8-bit
bytes per 32-bit word). No data selection or data interpre-
tation is done, and data is transferred at one byte per
VO_CLK from successive byte addresses.
Data-Streaming Mode. In data-streaming mode, data is
stored in SDRAM in two buffers.
When the EVO has transferred out the contents of one
buffer, it interrupts the DSPCPU and begins transferring
out the contents of the second buffer. The DSPCPU sup-
plies pointers to both buffers. The EVO can provide a
continuous stream of data to the EVO output if the
DSPCPU updates the pointer to the next buffer before
the EVO starts transferring data from the next table.
1.
Note that consecutive pixel components of each line
are stored in consecutive memory addresses but con-
secutive lines need not be in consecutive memory ad-
dresses
supplies
Data-transfer Modes
is
through
also
a
Figure
stream of
supported
Philips Semiconductors
7-22.
8-bit
by
data
setting
to
the
the
1
.