tm1300 NXP Semiconductors, tm1300 Datasheet - Page 324

• Manufacturer Part Number: tm1300
• Description: Tm-1300 Media Processor
• Manufacturer: NXP Semiconductors

TM1300 Data Book
fabsvalflags
SYNTAX
FUNCTION
DESCRIPTION
of r src1 and writes a bit vector representing the exception flags into r dest . The argument value is in IEEE single-
precision floating-point format; the result is an integer bit vector. The bit vector stored in r dest has the same format as
the IEEE exception bits in the PCSW. The exception flags in PCSW are left unchanged by this operation. If r src1 is
denormalized, the IFZ bit in the result is set.
the modification of the destination register. If the LSB of r guard is 1, r dest is written; otherwise, r dest is not changed.
EXAMPLES
A-38
r30 = 0x40400000 (3.0)
r35 = 0xbf800000 (-1.0)
r40 = 0x00400000 (5.877471754e-39)
r45 = 0xffffffff (QNaN)
r50 = 0xffbfffff (SNaN)
r10 = 0,
r55 = 0xff7fffff (–3.402823466e+38)
r20 = 1,
r55 = 0xff7fffff (–3.402823466e+38)
The
The
[ IF r guard ] fabsvalflags r src1
if r guard then
r dest
fabsvalflags
fabsvalflags
31
0
Initial Values
ieee_flags(abs_val((float)r src1 ))
operation computes the IEEE exceptions that would result from computing the absolute value
operation optionally takes a guard, specified in r guard . If a guard is present, its LSB controls
PRODUCT SPECIFICATION
fabsvalflags r30
fabsvalflags r35
fabsvalflags r40
fabsvalflags r45
fabsvalflags r50
IF r10 fabsvalflags r55
IF r20 fabsvalflags r55
IEEE status flags from floating-point absolute
r dest
Operation
7
0
r90
r95
r100
r105
r110
OFZ
6
IFZ
r115
r120
5
INV
4
fabsval faddflags readpcsw
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
r90
r95
r100
r105
r110
no change, since guard is false
r120
OVF
3
Philips Semiconductors
0x0
0x0
0x20 (IFZ)
0x0
0x10 (INV)
0x0
UNF
ATTRIBUTES
2
SEE ALSO
Result
INX
1
DBZ
0
value
falu
116
1, 4
No
—
1
3