tm1300 NXP Semiconductors, tm1300 Datasheet - Page 389

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tm1300

Manufacturer Part Number
tm1300
Description
Tm-1300 Media Processor
Manufacturer
NXP Semiconductors
Datasheet

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Part Number:
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Philips Semiconductors
Signed 16-bit load
pseudo-op for ild16d(0)
SYNTAX
FUNCTION
DESCRIPTION
argument. (Note: pseudo operations cannot be used in assembly source files.)
and stores the result in r dest . If the memory address contained in r src1 is not a multiple of 2, the result of
undefined but no exception will be raised. This load operation is performed as little-endian or big-endian depending on
the current setting of the bytesex bit in the PCSW.
defined only for 32-bit loads and stores.
modification of the destination register and the occurrence of side effects. If the LSB of r guard is 1, r dest is written and
the data cache status bits are updated if the addressed locations are cacheable. if the LSB of r guard is 0, r dest is not
changed and
EXAMPLES
r10 = 0xd00, [0xd00] = 0x22,
[0xd01] = 0x11
r30 = 0, r20 = 0xd04, [0xd04] = 0x84,
[0xd05] = 0x33
r40 = 1, r20 = 0xd04, [0xd04] = 0x84,
[0xd05] = 0x33
r50 = 0xd01
The
The
The result of an access by
The
[ IF r guard ] ild16 r src1
if r guard then {
}
if PCSW.bytesex = LITTLE_ENDIAN then
else
temp<7:0>
temp<15:8>
r dest
ild16
ild16
ild16
bs
bs
1
0
sign_ext16to32(temp<15:0>)
Initial Values
ild16
operation loads the 16-bit memory value from the address contained in r src1 , sign extends it to 32 bits,
operation is a pseudo operation transformed by the scheduler into an
operation optionally takes a guard, specified in r guard . If a guard is present, its LSB controls the
mem[(r src1 +(1
mem[(r src1 + (0
has no side effects whatever.
ild16
bs)]
bs)]
to the MMIO address aperture is undefined; access to the MMIO aperture is
ild16 r10
IF r30 ild16 r20
IF r40 ild16 r20
ild16 r50
r dest
Operation
r60
r90
PRODUCT SPECIFICATION
r70
r80
r60
no change, since guard is false
r80
r90 undefined, since 0xd01 is not a multiple of 2
DSPCPU Operations for TM1300
0x00002211
0xffff8433
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
ild16d ild16r ild16x
ild16d(0)
ATTRIBUTES
Result
SEE ALSO
with the same
ild16
ild16
dmem
4, 5
No
6
1
3
A-103
is

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