tm1300 NXP Semiconductors, tm1300 Datasheet - Page 313

• Manufacturer Part Number: tm1300
• Description: Tm-1300 Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Dual clipped subtract of signed 16-bit halfwords
SYNTAX
FUNCTION
DESCRIPTION
two pairs of high and low 16-bit halfwords of r src1 and r src2 . Both differences are clipped into the range [2
(or [0x7fff..0x8000]) and written into the corresponding halfwords of r dest . All values are signed 16-bit integers.
modification of the destination register. If the LSB of r guard is 1, r dest is written; otherwise, r dest is not changed.
EXAMPLES
r30 = 0x12340032, r40 = 0x00010002
r10 = 0, r30 = 0x12340032, r40 = 0x00010002
r20 = 1, r30 = 0x12340032, r40 = 0x00010002
r50 = 0x80000001, r80 = 0x00018001
r110 = 0x00018001, r120 = 0x80010002
As shown below, the
The
[ IF r guard ] dspidualsub r src1 r src2
if r guard then {
}
r src1
temp1
temp2
if temp1 < 0xffff8000 then temp1
if temp2 < 0xffff8000 then temp2
if temp1 > 0x7fff then temp1
if temp2 > 0x7fff then temp2
r dest <31:16>
r dest <15:0>
dspidualsub
3
sign_ext16to32(r src1 <15:0>) – sign_ext16to32(r src2 <15:0>)
sign_ext16to32(r src1 <31:16>) – sign_ext16to32(r src2 <31:16>)
17-bit signed differences
signed
Initial Values
temp1<15:0>
Two full-precision
temp2<15:0>
dspidualsub
operation optionally takes a guard, specified in r guard . If a guard is present, its LSB controls the
1
r dest
0x7fff
0x7fff
1
0x8000
0x8000
3
signed
Clip to [2
operation computes two 16-bit clipped, signed differences separately on the
signed
dspidualsub r30 r40
IF r10 dspidualsub r30 r40
IF r20 dspidualsub r30 r40
dspidualsub r50 r80
dspidualsub r110 r120
15
signed
–1..–2
0
15
]
0
r dest
1
1
PRODUCT SPECIFICATION
r src2
Operation
Clip to [2
3
signed
signed
15
–1..–2
signed
r60
r90
r125
15
DSPCPU Operations for TM1300
]
0
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
0
dspidualabs dspidualadd
r70
r100
dspidualmul dspiabs
1
dspidualsub
ATTRIBUTES
r60
no change, since guard is
false
r100
r90
r125
SEE ALSO
signed
0x12330030
0x80007fff
0x12330030
0x7fff8000
Result
15
dspalu
–1..–2
1, 3
No
71
—
0
2
2
A-27
15
]