tm1300 NXP Semiconductors, tm1300 Datasheet - Page 305

• Manufacturer Part Number: tm1300
• Description: Tm-1300 Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Read clock cycle counter, least-significant word
SYNTAX
FUNCTION
DESCRIPTION
cycles
register, r dest . The contents of the master counter are transferred to the slave CCCOUNT register only on a
successful interruptible jump and on processor reset. Thus, if
intervening interruptible jumps, the operation pair is guaranteed to be a coherent sample of the master clock-cycle
counter. The master counter increments on all cycles (processor-stall and non-stall) if PCSW.CS = 1; otherwise, the
counter increments only on non-stall cycles.
modification of the destination register. If the LSB of r guard is 1, r dest is written; otherwise, r dest is not changed.
EXAMPLES
CCCOUNT_HR = 0xabcdefff12345678
r10 = 0, CCCOUNT_HR = 0xabcdefff12345678
r20 = 1, CCCOUNT_HR = 0xabcdefff12345678
Refer to
The
[ IF r guard ] cycles
if r guard then
r dest
cycles
operation copies the low 32 bits of the slave register of Clock Cycle Counter (CCCOUNT) to the destination
Section 3.1.6, “CCCOUNT—Clock Cycle Counter”
CCCOUNT<31:0>
Initial Values
operation optionally takes a guard, specified in r guard . If a guard is present, its LSB controls the
r dest
cycles
IF r10 cycles
IF r20 cycles
r60
Operation
PRODUCT SPECIFICATION
for a description of the CCCOUNT operation. The
cycles
r70
r100
and
DSPCPU Operations for TM1300
hicycles
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
r30
no change, since guard is false
r100
hicycles curcycles
0x12345678
0x12345678
ATTRIBUTES
writepcsw
SEE ALSO
are executed without
Result
cycles
fcomp
154
No
—
0
1
3
A-19