tm1300 NXP Semiconductors, tm1300 Datasheet - Page 377

• Manufacturer Part Number: tm1300
• Description: Tm-1300 Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Convert signed integer to floating-point
SYNTAX
FUNCTION
DESCRIPTION
writes the result into r dest . Rounding is according to the IEEE rounding mode bits in PCSW. If
IEEE exception, such as inexact, the corresponding exception flags in the PCSW are set. The PCSW exception flags
are sticky: the flags can be set as a side-effect of any floating-point operation but can only be reset by an explicit
writepcsw
other floating-point compute operations update the PCSW at the same time, the net result in each exception flag is the
logical OR of all simultaneous updates ORed with the existing PCSW value for that exception flag.
modification of the destination register. If the LSB of r guard is 1, r dest and the exception flags in PCSW are written;
otherwise, r dest is not changed and the operation does not affect the exception flags in PCSW.
EXAMPLES
r30 = 3
r40 = 0xffffffff (-1)
r10 = 0, r50 = 0xfffffffd
r20 = 1, r50 = 0xfffffffd
r60 = 0x7fffffff (2147483647)
r70 = 0x80000000 (-2147483648)
r80 = 0x7ffffff1 (2147483633)
The
The
The
[ IF r guard ] ifloat r src1
if r guard then {
}
r dest
ifloat
ifloatflags
ifloat
Initial Values
(float) ((long)r src1 )
operation. The update of the PCSW exception flags occurs at the same time as r dest is written. If any
operation converts the signed integer value in r src1 to single-precision IEEE floating-point format and
operation optionally takes a guard, specified in r guard . If a guard is present, its LSB controls the
operation computes the exception flags that would result from an individual
ifloat r30
ifloat r40
IF r10 ifloat r50
IF r20 ifloat r50
ifloat r60
ifloat r70
ifloat r80
r dest
Operation
r100
r105
r117
r120
r122
r110
r115
PRODUCT SPECIFICATION
r100
r105
no change, since guard is false
r115
r117
r120
r122
0x40400000 (3.0)
0xbf800000 (-1.0)
0xc0400000 (–3.0)
0x4f000000 (2.147483648e+9), INX flag set
0xcf000000 (-2.147483648e+9)
0x4f000000 (2.147483648e+9), INX flag set
DSPCPU Operations for TM1300
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
ufloat ifloatrz ufloatrz
ifixieee ifloatflags
Result
ATTRIBUTES
SEE ALSO
ifloat
ifloat
ifloat
causes an
.
falu
1, 4
No
20
—
1
3
A-91