tm1300 NXP Semiconductors, tm1300 Datasheet - Page 344
tm1300
Manufacturer Part Number
tm1300
Description
Tm-1300 Media Processor
Manufacturer
NXP Semiconductors
Datasheet
1.TM1300.pdf
(533 pages)
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TM1300 Data Book
fsignflags
SYNTAX
FUNCTION
DESCRIPTION
stores a bit vector representing the exception flags into r dest . The argument value is in IEEE single-precision floating-
point format; the result is an integer bit vector. The bit vector stored in r dest has the same format as the IEEE
exception bits in the PCSW. The exception flags in PCSW are left unchanged by this operation. If the argument is
denormalized, zero is substituted before computing the sign, and the IFZ bit in the result is set.
modification of the destination register. If the LSB of r guard is 1, r dest is written; otherwise, r dest is not changed.
EXAMPLES
A-58
r30 = 0x40400000 (3.0)
r40 = 0xbf800000 (-1.0)
r50 = 0x80800000 (-1.175494351e-38)
r60 = 0x80400000 (-5.877471754e-39)
r10 = 0, r70 = 0xffffffff (QNaN)
r20 = 1, r70 = 0xffffffff (QNaN)
r80 = 0xff800000 (-INF)
The
The
[ IF r guard ] fsignflags r src1
if r guard then
fsignflags
fsignflags
r dest
31
0
Initial Values
ieee_flags(sign((float)r src1 ))
operation computes the IEEE exceptions that would result from computing the sign of r src1 and
operation optionally takes a guard, specified in r guard . If a guard is present, its LSB controls the
PRODUCT SPECIFICATION
fsignflags r30
fsignflags r40
fsignflags r50
fsignflags r60
IF r10 fsignflags r70
IF r20 fsignflags r70
fsignflags r80
r dest
IEEE status flags from floating-point sign
Operation
7
0
r100
r105
r110
r115
r120
OFZ
6
r116
r117
IFZ
5
INV
4
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
r100
r105
r110
r115
no change, since guard is false
r117
r120
OVF
3
Philips Semiconductors
0
0
0
0x20 (IFZ)
0x10 (INV)
0
fsign readpcsw
UNF
ATTRIBUTES
2
SEE ALSO
Result
INX
1
DBZ
0
fcomp
153
No
—
1
1
3
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