tm1300 NXP Semiconductors, tm1300 Datasheet - Page 239
tm1300
Manufacturer Part Number
tm1300
Description
Tm-1300 Media Processor
Manufacturer
NXP Semiconductors
Datasheet
1.TM1300.pdf
(533 pages)
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Philips Semiconductors
served by software, and the hardware I
disconnected from the SCL and SDA pins. Refer to
Figure 16-3
Software mode is by default disabled after boot. Soft-
ware
IIC_CR.SW_MODE_EN. At that point, the SCL and SDA
pins can be controlled by the IIC_CR SDA_OUT and
SCL_OUT bits. Writing a ‘1’ to either bit causes the cor-
responding pin to become active, i.e. be pulled low. The
SDA and SCL lines are open-collector outputs, and can
hence also be pulled low by external devices. The actual
pin state can be observed by software by examining
IIC_SR SDA_STAT and SCL_STAT bits. A 1 in these
MMIO bits indicates that the corresponding pin is cur-
rently pulled low.
By appropriate software, possibly using a timer interrupt,
full I
mechanism.
16.6
Hardware operation of I
The TM1300 I
two modes:
1. Master-transmitter (to write data to a slave)
2. Master-receiver (to read data from a slave)
Figure 16-3. I
2
C functionality can be implemented using this
mode
I
hardware
2
I2C
C HARDWARE OPERATION MODE
for a clarification of the principles involved.
2
2
C hardware interface operates in one of
C software mode only logic
is
enabled
2
C is the default mode after boot.
HIWAY
by
DATA
writing
2
C interface is
a
‘1’
scl_out
sda_out
sda_stat
scl_stat
D Q
D Q
tribuf
tribuf
to
sw_mode_en
sw_mode_en
As a master, the I
pulses and the START and STOP bus conditions. The
START and STOP bus conditions are shown in
Figure
or a repeated START condition. Since a repeated
START condition is also the beginning of the next serial
transfer, the I
Note: The I
master ONLY!
The number of bytes transferred between the START
and STOP conditions from transmitter to receiver is not
limited. Each 8-bit data byte is followed by one acknowl-
edge bit. The transmitter releases the SDA line which will
pull-up to a HIGH level during the acknowledge bit time.
The receiver acknowledges by pulling the data line LOW
PRODUCT SPECIFICATION
Figure 16-4. START and STOP Conditions on I
16-4. A transfer is ended with a STOP condition
SDA
SCL
open drain
open drain
2
START
2
C interface on TM1300 will operate as a
C bus will not be released.
buf
S
buf
2
C logic will generate all the serial clock
SCL
SDA
I2C Interface
STOP
P
2
C
16-5
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