tm1300 NXP Semiconductors, tm1300 Datasheet - Page 365
tm1300
Manufacturer Part Number
tm1300
Description
Tm-1300 Media Processor
Manufacturer
NXP Semiconductors
Datasheet
1.TM1300.pdf
(533 pages)
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Philips Semiconductors
Invalidate all instruction cache blocks
SYNTAX
FUNCTION
DESCRIPTION
blocks.
included in the discard from the instruction cache, but i+3 will be retained.
modification of the destination register. If the LSB of r guard is 1, r dest is written; otherwise, r dest is not changed.
EXAMPLES
r10 = 0
r20 = 1
The
iclr
iclr
The side effect time behavior of
The
[ IF r guard ] iclr
if r guard then {
}
block
for all blocks in instruction cache {
}
iclr
iclr
icache_reset_valid_block(block)
block
does clear the valid bits of locked blocks.
ensures coherency between caches and main memory by discarding all pending prefetch operations.
0
operation resets the valid bits of all blocks in the instruction cache.
operation optionally takes a guard, specified in r guard . If a guard is present, its LSB controls the
block + 1
Initial Values
iclr
is such that if instruction i performs an iclr, instructions i, i+1, i+2 will be
iclr
IF r10 iclr
IF r20 iclr
iclr
does not change the replacement status of instruction-cache
Operation
PRODUCT SPECIFICATION
DSPCPU Operations for TM1300
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
no change and no stall cycles, since
guard is false
dcb dinvalid
ATTRIBUTES
SEE ALSO
Result
branch
2, 3, 4
184
n/a
No
—
0
iclr
A-79
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