tm1300 NXP Semiconductors, tm1300 Datasheet - Page 414

• Manufacturer Part Number: tm1300
• Description: Tm-1300 Media Processor
• Manufacturer: NXP Semiconductors

TM1300 Data Book
ld32
SYNTAX
FUNCTION
DESCRIPTION
argument. (Note: pseudo operations cannot be used in assembly source files.)
r dest . If the memory address contained in r src1 is not a multiple of 4, the result of
will be raised. This load operation is performed as little-endian or big-endian depending on the current setting of the
bytesex bit in the PCSW.
memory operations is undefined). The state of the BSX bit in the PCSW has no effect on MMIO access by
modification of the destination register and the occurrence of side effects. If the LSB of r guard is 1, r dest is written and
the data cache status bits are updated if the addressed locations are cacheable. if the LSB of r guard is 0, r dest is not
changed and
EXAMPLES
A-128
r10 = 0xd00,
[0xd00] = 0x84, [0xd01] = 0x33,
[0xd02] = 0x22, [0xd03] = 0x11
r30 = 0, r20 = 0xd04,
[0xd04] = 0x48, [0xd05] = 0x66,
[0xd06] = 0x55, [0xd07] = 0x44
r40 = 1, r20 = 0xd04,
[0xd04] = 0x48, [0xd05] = 0x66,
[0xd06] = 0x55, [0xd07] = 0x44
r50 = 0xd01
The
The
The
The
[ IF r guard ] ld32 r src1
if r guard then {
}
if PCSW.bytesex = LITTLE_ENDIAN then
else
r dest <7:0>
r dest <15:8>
r dest <23:16>
r dest <31:24>
ld32
ld32
ld32
ld32
bs
bs
Initial Values
3
0
operation can be used to access the MMIO address aperture (the result of MMIO access by 8- or 16-bit
operation loads the 32-bit memory value from the address contained in r src1 and stores the result in
ld32
operation is a pseudo operation transformed by the scheduler into an
operation optionally takes a guard, specified in r guard . If a guard is present, its LSB controls the
mem[r src1 + (3
mem[r src1 + (2
mem[r src1 + (1
mem[r src1 + (0
has no side effects whatever.
PRODUCT SPECIFICATION
bs)]
bs)]
bs)]
bs)]
ld32 r10
IF r30 ld32 r20
IF r40 ld32 r20
ld32 r50
r dest
Operation
r60
r90
r70
r80
r60
no change, since guard is false
r80
r90 undefined, since 0xd01 is not a multiple of 4
0x84332211
0x48665544
ld32
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
ld32d ld32r ld32x st32
is undefined but no exception
Philips Semiconductors
pseudo-op for ld32d(0)
ld32d(0)
st32d h_st32d
Result
ATTRIBUTES
SEE ALSO
32-bit load
with the same
ld32
dmem
4, 5
No
—
7
1
3
.