r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1080

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 25 Stream Interface (STIF)
25.3.8
STIFIFO is an FIFO register that relays the stream data to be transmitted or received.
Initial value:
Initial value:
Rev. 1.00 Oct. 01, 2007 Page 1014 of 1956
REJ09B0256-0100
Bit
31 to 0 STD[31:0] All 0
R/W:
R/W:
Bit:
Bit:
Bit Name
Transmit/Receive FIFO Data Registers 0, 1 (STIFIFO0, STIFIFO1)
R/W
R/W
31
15
0
0
R/W
R/W
30
14
0
0
Initial
Value
R/W
R/W
29
13
0
0
R/W
R/W
28
12
0
0
R/W
R/W
R/W
R/W
27
11
0
0
R/W
R/W
26
10
0
0
Description
Transmit/Receive Stream Data
At transmission, transmit data should be written to this
register. At reception, received data is read from this
register.
R/W
R/W
25
0
9
0
STD[31:16]
R/W
R/W
24
STD[15:0]
0
8
0
R/W
R/W
23
0
7
0
R/W
R/W
22
0
6
0
R/W
R/W
21
0
5
0
R/W
R/W
20
0
4
0
R/W
R/W
19
0
3
0
R/W
R/W
18
0
2
0
R/W
17
0
1
0
R/W
R/W
16
0
0
0