r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 72

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 1 Overview
Rev. 1.00 Oct. 01, 2007 Page 6 of 1956
REJ09B0256-0100
Item
Local bus state
controller (LBSC)
Features
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Physical address space divided into seven areas (areas 0 to 6), each
comprising up to 64 Mbytes
 I/F configuration, bus width, and wait cycle insertion are settable for
SRAM interface
 Wait cycle insertion by register setting
 Wait cycle insertion by the RDY pin
 Supported bus width: 8, 16, or 32 bits
 Supported space: Areas 0 to 2 and areas 4 to 6
Burst ROM interface
 Wait cycle insertion by register setting
 Number of bursts is specified by register setting
 Supported bus width: 8, 16, or 32 bits
 Supported space: Areas 0, 5, and 6
Interface for SRAM with byte selection
 Supports direct connection to SRAM with byte selection
 Supported space: Areas 1 and 4
PCMCIA interface (only supported in little endian mode)
 Wait cycle insertion by register setting
 Supports ATAPI interface (multi-word DMA supported)
 Supports I/O bus-width sizing
 Supported space: Areas 5 and 6
each area