r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 348

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 9 Interrupt Controller (INTC)
Rev. 1.00 Oct. 01, 2007 Page 282 of 1956
REJ09B0256-0100
Bit
31 to 26 —
25
24
23, 22
21
20
19, 18
17
16
15
14, 13
12
11
10
9
8
7
6
5
4
3
2
Bit Name
SCIF2
USBF
—
STIF1
STIF0
—
USBH
GETHER
PCC
—
ADC
TPU
SIM
SIOF2
SIOF1
LCDC
—
IIC1
IIC0
SSI3
SSI2
Initial
Value
All 0
0
0
All 0
0
0
All 0
0
0
0
All 0
0
0
0
0
0
0
0
0
0
0
0
R/W
R
R/W
R/W
R
R/W
R/W
R
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
0. The write value should
always be 0
Clears SCIF2 interrupt masking
Clears USBF interrupt masking
0. The write value should
always be 0
Clears STIF1 interrupt masking
Clears STIF0 interrupt masking
0. The write value should
always be 0
Clears GETHER interrupt
masking
Clears PCC interrupt masking
0. The write value should
always be 0
Clears ADC interrupt masking
Clears TPU interrupt masking
Clears SIM interrupt masking
Clears SIOF2 interrupt masking
Clears SIOF1 interrupt masking
The write value should always
be 0
Clears IIC1 interrupt masking
Clears IIC0 interrupt masking
Clears SSI3 interrupt masking
Clears SSI2 interrupt masking
Function
These bits are always read as
These bits are always read as
These bits are always read as
Clears USBH interrupt masking
These bits are always read as
Clears LCDC interrupt masking
This bit is always read as 0.
Description
Clears interrupt
masking for each
peripheral module.
[When writing]
0: Invalid
1: Interrupt mask is
[When reading]
Always 0
cleared