r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 98

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r5s77631ay266bgv

Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 1 Overview
Rev. 1.00 Oct. 01, 2007 Page 32 of 1956
REJ09B0256-0100
Pin No. Pin Name
AB11
AB12
AB13
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB24
AB25
AC1
AC2
AC3
AC4
AC5
PTB2/AD11/PINT10/LCDM_D7 IO/IO/I/O
PTB6/CBE0/PINT14/
LCDM_D3
PTC1/AD4/LCDM_D1
VCCQ
MPMD
PTO6/IRQ0/IRL0/
DACK1M/MD5
PTO2/AUDATA1/
RMII0M1_MDC
TDO
VCCQ
AN3
AN2
PTH6/AD27/TPU_TO2/
ET1_CRS/RMII1M_TXD_EN
PTH0/AD25/TPU_TI3A/
ET1_COL/RMII1M_RX_ER
VCCQ
PTH1/IDSEL/TPU_TI3B/
ET1_RX-ER/RMII1M_CRS_DV
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
I/O
IO/IO/I/O
IO/IO/O
I
IO/I/I/O/I
IO/O/O
O
I
I
IO/IO/O/I/O
IO/IO/I/I/I
IO/I/I/I/I
Function
Port/PCI address-and-data bus/port
interrupt input/LCD data (mirror pin)
enable/port interrupt input/LCD data
(mirror pin)
Port/PCI address-and-data bus/LCD
data (mirror pin)
I/O GND
I/O VCC
Chip mode specification
Port/external interrupt input/DMA
transfer request acknowledge (mirror
pin)/mode control (endian switching)
data clock
I/O GND
H-UDI data output
I/O GND
I/O GND
I/O VCC
Analog input
Analog input
clock output/ETHER carrier
detection/RMII transmit enable
(mirror pin)
Port/PCI address-and-data bus/TPU
clock input/ETHER collision
detection/RMII receive error (mirror
pin)
I/O GND
I/O VCC
Port/PCI configuration device
select/TPU clock input/ETHER
receive error/RMII carrier detection
(mirror pin)
Port/PCI command and byte
Port/AUD data/RMII management
Port/PCI address-and-data bus/TPU
Power
Supply
VCCQ
VCCQ
VCCQ
VCCQ
VCCQ
VCCQ
VCCQ
AVcc
AVcc
VCCQ
VCCQ
VCCQ

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