r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 486

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 12 DDR-SDRAM Interface (DDRIF)
Rev. 1.00 Oct. 01, 2007 Page 420 of 1956
REJ09B0256-0100
Bit
8
7 to 4
3
2, 1
0
Bit Name
ENDIAN

DLLEN

DCE
Initial
Value
Undefined R
All 0
0
All 0
0
R/W
R
R/W
R
R/W
Description
Endian Identification
Indicates whether the big endian mode or little endian
mode is set to the external data bus.
1: Big endian mode
0: Little endian mode
Reserved
These bits are always read as 0. The write value
should always be 0.
DLL Enable
Sets whether the DLL for generating the read timing for
the DDR-SDRAM is valid or invalid. When this bit is
set to 1, the DLL is enabled and read access to
memory is possible.
Reserved
These bits are always read as 0. The write value
should always be 0.
DDR Controller Enable
Enables SDRAM control by the DDRIF.
1: Enable
0: Disable