r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 79
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r5s77631ay266bgv
Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S77631AY266BGV.pdf
(2026 pages)
- Current page: 79 of 2026
- Download datasheet (12Mb)
1.2
Block Diagram
Note: * SECURITY is incorporated only in the R5S77630, not in the R5S77631.
[Legend]
AUD:
CMT:
CPG:
CPU:
DDRIF:
DMAC:
FPU:
GPIO:
SBR:
HPB:
I-Cache:
INTC:
LBSC:
PCC:
LRAM:
MMCIF:
MMU:
O-Cache:
PCIC:
EXCPU:
RTC:
UBC:
H-UDI:
GETHER:
SECURITY*: Security accelerator
USBH:
CPU
UBC
AUD
FPU
Advanced user debugger
Compare match timer
Clock pulse generator
Central processing unit
DDR-SDRAM interface
Direct memory access controller
Floating-point unit
General purpose I/O
SuperHyway bridge
Peripheral bus bridge
Instruction cache
Interrupt controller
Local bus state controller
PC card controller
L memory
Multimedia card interface
Memory management unit
Operand (data) cache
PCI controller
External CPU interface
Realtime clock
User break controller
User debugging interface
Gigabit Ethernet controller
USB host controller
SECURITY*
GETHER
USBH
USBF
Figure 1.1 SH7763 Block Diagram
O-cache
I-cache
LRAM
MMU
SBR
USBF:
SCIF:
SIOF:
SSI:
STIF:
HAC:
AD/DA:
TMU:
IIC:
WDT:
SIM:
TPU:
LCDC:
USB function controller
Serial communication interface with FIFO
Serial I/O with FIFO
Serial sound interface
Stream interface
Audio codec interface
A/D converter, D/A converter
Timer unit
IIC bus interface
Watchdog timer
SIM card module
16-bit pulse unit
LCD controller
6 channels
EXCPU
DDRIF
DMAC
LCDC
H-UDI
LBSC
PCIC
INTC
CPG
CMT
TMU
WDT
PCC
HPB
TPU
Rev. 1.00 Oct. 01, 2007 Page 13 of 1956
(External bus)
3 channels
3 channels
2 channels
4 channels
2 channels
(External bus)
(External bus)
(External bus)
MMCIF
AD/DA
SIOF
SCIF
STIF
GPIO
HAC
RTC
SIM
Section 1 Overview
SSI
IIC
REJ09B0256-0100
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