r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 68

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r5s77631ay266bgv

Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 1 Overview
Table 1.1
Rev. 1.00 Oct. 01, 2007 Page 2 of 1956
REJ09B0256-0100
Item
Maximum operating
frequency
Performance
CPU
Features of the SH7763
Features
266 MHz
478 MIPS (266 MHz), 1862 MFLOPS (266 MHz)
Renesas Technology original architecture
32-bit internal data bus
General-register files:
 Sixteen 32-bit general registers (eight 32-bit shadow registers)
 Seven 32-bit control registers
 Four 32-bit system registers
RISC-type instruction set (upward compatible with the SH-1, SH-2, SH-3
and SH-4 microcomputers)
 Instruction length: 16-bit fixed length for improved code efficiency
 Load/store architecture
 Delayed branch instructions
 Instructions executed with conditions
 Instruction set based on the C language
Super scalar which executes two instructions simultaneously including
the FPU
Instruction execution time: Two instruction per cycle (max)
Virtual address apace: 4 Gbytes
Space identifier ASID: 8 bits, 256 virtual address spaces
On-chip multiplier
Seven-stage pipeline

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