r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1305

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

(6)
Synchronous pulse method, falling edge sampling, slot No.0 used for left-channel data, slot No.1
used for right-channel data, slot No.2 used for control data for channel 0, slot No.3 used for
control data for channel 1, and frame length = 128 bits
(7)
Synchronous pulse method, falling edge sampling, slot No.0 used for left-channel data, slot No.2
used for right-channel data, slot No.1 used for control data for channel 0 , slot No.3 used for
control data for channel 1, and frame length = 128 bits
SIOF_SCK
SIOF_RXD
SIOF_SYNC
SIOF_TXD
SIOF_SCK
SIOF_SYNC
SIOF_RXD
SIOF_TXD
16-bit Stereo Data (Case 3)
16-bit Stereo Data (Case 4)
Specifications:
Specifications:
Figure 29.18 Transmit and Receive Timing (16-Bit Stereo Data (3))
Figure 29.19 Transmit and Receive Timing (16-Bit Stereo Data (4))
Slot No.0
Slot No.0
L-channel
L-channel
1 bit delay
data
1 bit delay
data
TRMD[1:0] = 00 or 10,
TDLE = 1,
RDLE = 1,
CD0E = 1,
TRMD[1:0] = 00 or 10,
TDLE = 1,
RDLE = 1,
CD0E = 1,
Slot No.1
Slot No.1
R-channel
channel 0
Control
data
channel 0
Slot No.2
Slot No.2
R-channel
Control
data
REDG = 0,
TDLA[3:0] = 0000,
RDLA[3:0] = 0000,
CD0A[3:0] =0010,
REDG = 1,
TDLA[3:0] = 0000,
RDLA[3:0] = 0000,
CD0A[3:0] = 0001,
1 frame
1 frame
Slot No.3
Slot No.3
channel 1
channel 1
Control
Control
Slot No.4
Slot No.4
FL[3:0] = 1110 (frame length: 128 bits),
TDRE = 1,
RDRE = 1,
CD1E = 1,
FL[3:0] = 1110 (frame length: 128 bits)
TDRE = 1,
RDRE = 1,
CD1E = 1,
Rev. 1.00 Oct. 01, 2007 Page 1239 of 1956
Section 29 Serial I/O with FIFO (SIOF)
Slot No.5
Slot No.5
TDRA[3:0] = 0001,
RDRA[3:0] = 0001,
CD1A[3:0] = 0011
TDRA[3:0] = 0010,
RDRA[3:0] = 0010,
CD1A[3:0] = 0011
Slot No.6
Slot No.6
REJ09B0256-0100
Slot No.7
Slot No.7