r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 565
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r5s77631ay266bgv
Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S77631AY266BGV.pdf
(2026 pages)
- Current page: 565 of 2026
- Download datasheet (12Mb)
Bit
6
5
4
3
2
1
0
Bit Name
SEDIM
DPEITWM 0
PEDITRM
TADIMM
MADIMM
MWPDIM
MRDPEIM 0
Initial
Value
0
0
0
0
0
R/W
SH: R/W
PCI: R
SH: R/W
PCI: R
SH: R/W
PCI: R
SH: R/W
PCI: R
SH: R/W
PCI: R
SH: R/W
PCI: R
SH: R/W
PCI: R
Description
SERR Detection Interrupt Mask
0: PCIIR.SEDI disabled (masked)
1: PCIIR.SEDI enabled (not masked)
Data Parity Error Interrupt Mask for Target Write
0: PCIIR.DPEITW disabled (masked)
1: PCIIR.DPEITW enabled (not masked)
PERR Detection Interrupt Mask for Target Read
0: PCIIR.PEDITR disabled (masked)
1: PCIIR.PEDITR enabled (not masked)
Target-Abort Interrupt Mask for Master
0: PCIIR.TADIM disabled (masked)
1: PCIIR.TADIM enabled (not masked)
Master-Abort Interrupt Mask for Master
0: PCIIR.MADIM disabled (masked)
1: PCIIR.MADIM enabled (not masked)
Master Write Data Parity Error Interrupt Mask
0: PCIIR.MWPDI disabled (masked)
1: PCIIR.MWPDI enabled (not masked)
Master Read Data Parity Error Interrupt Mask
0: PCIIR.MRDPEI disabled (masked)
1: PCIIR.MRDPEI enabled (not masked)
Rev. 1.00 Oct. 01, 2007 Page 499 of 1956
Section 13 PCI Controller (PCIC)
REJ09B0256-0100
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