r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1346

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r5s77631ay266bgv

Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 30 SIM Card Module (SIM)
(b) Retransmission when the smart card interface is in transmit mode (T = 0)
1. After completion of transmission of one frame, if an error signal is returned from the receive
2. In T = 0 mode, the TEND bit in SCSSR is not set for a frame when an error signal indicating
3. If no error signal is returned from the receive side, the ERS bit in SCSSR is not set.
4. If no error signal is returned from the receive side, it is assumed that transmission of one
Rev. 1.00 Oct. 01, 2007 Page 1280 of 1956
REJ09B0256-0100
Figure 30.9 shows retransmit operations when the smart card interface is in transmit mode.
Step (1) to step (4) of figure 30.9 correspond to the following operation
side, the ERS bit in SCSSR is set to 1. If the RIE bit in SCSCR is set to enable, an ERI request
is issued. The ERS bit in SCSSR should be cleared to 0 before the sampling timing for the next
parity bit.
an error is received.
frame, including retransmission, is completed, and the TEND bit in SCSSR is set to 1. At this
time, if the TIE bit in SCSCR is set to enable, a TEI interrupt request is issued.
TDRE
TEND
ERS
Transmission from SCTDR to SCTSR
Ds
D0 D1 D2 D3 D4 D5 D6 D7 DP
nth transmit frame
Figure 30.9 Retransmit Standby Mode (Clock Stopped)
when Smart Card Interface is in Transmit Mode
(1)
DE
(2)
Ds
D0 D1 D2 D3 D4 D5 D6 D7 DP
Retransmit frame
(4)
(3)
Transmisson from SCTDR to SCTSR
(DE)
Ds
(n+1) th transmit frame
D0 D1 D2 D3 D4

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