r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 679

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

CS
RD
Data
WEn
DACKn
(Active-low)
TENDn
(Active-low)
WAIT
Note: TEND is asserted during the last transfer unit of the DMA transfer.
CLKOUT
Address
(No Wait, Idle Cycle 1, Longword Access to 16-Bit Device)
Figure 14.18 Example of BSC Ordinary Memory Access
When the transfer unit is divided into several bus cycles and CS is negated
between bus cycles, TEND is also divided.
T1
T2
Taw
Section 14 Direct Memory Access Controller (DMAC)
T1
Rev. 1.00 Oct. 01, 2007 Page 613 of 1956
T2
REJ09B0256-0100