r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1840

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 41 User Break Controller (UBC)
41.2.4
CMAR0 and CMAR1 are readable/writable 32-bit registers which specify the bits to be masked
among the address bits specified by using the match address setting register of the corresponding
channel. (Set the bits to be masked to 1.)
• CAMR0
Rev. 1.00 Oct. 01, 2007 Page 1774 of 1956
REJ09B0256-0100
Bit
31 to 0
Initial value :
Initial value :
R/W:
R/W:
Bit :
Bit :
Match Address Mask Setting Registers 0 and 1 (CAMR0 and CAMR1)
Bit Name
CAM
R/W
R/W
31
15
R/W
R/W
30
14
R/W
R/W
Initial
Value
Undefined
29
13
R/W
R/W
28
12
R/W
R/W
27
11
R/W
R/W
R/W
R/W
26
10
Description
Compare Address Mask
Specifies the bits to be masked among the address
bits which are specified using the CAR0 register. (Set
the bits to be masked to 1.)
0: Address bits CA[n] are included in the break
1: Address bits CA[n] are masked and not included in
[n] = any values from 31 to 0
R/W
R/W
25
9
condition.
the break condition.
R/W
R/W
24
8
CAM
CAM
R/W
R/W
23
7
R/W
R/W
22
6
R/W
R/W
21
5
R/W
R/W
20
4
R/W
R/W
19
3
R/W
R/W
18
2
R/W
R/W
17
1
R/W
R/W
16
0